W24C
Abstract: No abstract text available
Text: 24 Lead Cerpack NS Package Number W24C All dimensions are in inches millimeters LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
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54ACTQ657
Abstract: No abstract text available
Text: 54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description Features The ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator/checker. Intended for bus oriented applications, the device combines
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54ACTQ657
ACTQ657
54ACTQ657
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diode E0A
Abstract: 93L08 93L08DMQB 93L08FMQB C1995 J24A W24C
Text: 93L08 Dual 4-Bit Latch General Description The 93L08 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems Each latch contains both an active LOW Master Reset input and active LOW Enable inputs Connection Diagram
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93L08
93L08
93L08DMQB
93L08FMQB
C1995
RRD-B30M105
diode E0A
93L08FMQB
J24A
W24C
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54F676DM
Abstract: 54F676FM 54F676SDM 74F676 74F676PC 74F676SC 74F676SPC N24A N24C
Text: 54F 74F676 16-Bit Serial Parallel-In Serial-Out Shift Register General Description Features The ’F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output When the Mode M input is HIGH information present on the parallel
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74F676
16-Bit
74F676PC
54F676DM
54F676FM
54F676SDM
74F676
74F676PC
74F676SC
74F676SPC
N24A
N24C
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National AN-64
Abstract: 54F544LM 54F544SDM 74F544 74F544MSA 74F544SC 74F544SPC N24C 54F544DM 54F544FM
Text: 54F 74F544 Octal Registered Transceiver General Description Features The ’F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of
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74F544
74F544SPC
20-3A
National AN-64
54F544LM
54F544SDM
74F544
74F544MSA
74F544SC
74F544SPC
N24C
54F544DM
54F544FM
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AM248
Abstract: 54F825FM 54F825LM 54F825SDM 74F825 74F825SC 74F825SPC J24F M24B N24C
Text: 54F 74F825 8-Bit D-Type Flip-Flop General Description Features The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems Also included in the ’F825 are multiple enables that allow multiuser control of the interface
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74F825
Am29825
74F825SPC
Am24825
24-Lead
74F825SC
54F825SDMonductor
20-3A
AM248
54F825FM
54F825LM
54F825SDM
74F825
74F825SC
74F825SPC
J24F
M24B
N24C
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DS100233
Abstract: 54ACTQ543 54ACTQ543DMQB 54ACTQ543FMQB 54ACTQ543LMQB E28A J24A W24C actq543
Text: 54ACTQ543 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs General Description Features The ACTQ543 is a non-inverting octal transceiver containing two sets of D-type registers for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data
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54ACTQ543
ACTQ543
dyna959
DS100233
54ACTQ543
54ACTQ543DMQB
54ACTQ543FMQB
54ACTQ543LMQB
E28A
J24A
W24C
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F100K
Abstract: No abstract text available
Text: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or
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signal959
F100K
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LVX4245
Abstract: 54LVX4245 54LVX4245J-QML 54LVX4245W-QML J24F W24C
Text: 54LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs General Description Features The LVX4245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V/5V supply environment. The Transmit/Receive
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54LVX4245
LVX4245
54LVX4245
54LVX4245J-QML
54LVX4245W-QML
J24F
W24C
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54F657FM
Abstract: 54F657LM 54F657SDM 74F657 74F657SPC 75F657SC F245 F657 N24C
Text: 54F 74F657 Octal Bidirectional Transceiver with 8-Bit Parity Generator Checker and TRI-STATE Outputs General Description Features The ’F657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator checker It is intended for bus-oriented applications The buffers have
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74F657
74F657SPC
24-pin
F280A
54F65onductor
20-3A
54F657FM
54F657LM
54F657SDM
74F657SPC
75F657SC
F245
F657
N24C
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LVXC3245
Abstract: W24A 54LVXC3245 54LVXC3245J-QML 54LVXC3245W-QML J24F
Text: 54LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with TRI-STATE Outputs General Description Features The LVXC3245 is a 24-pin dual-supply, 8-bit configurable voltage interface transceiver suited for real time configurable I/O applications. The VCCA pin accepts a 3V supply level.
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54LVXC3245
LVXC3245
24-pin
W24A
54LVXC3245
54LVXC3245J-QML
54LVXC3245W-QML
J24F
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Untitled
Abstract: No abstract text available
Text: 54LVX3383 10-Bit Low Power Bus-Exchange Switch General Description Features The 54LVX3383 provides two sets of high-speed CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground
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54LVX3383
10-Bit
5962-9950601QLA
54LVX3383J-QML
5962-9950601QKA
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Untitled
Abstract: No abstract text available
Text: 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable En inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or
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5-Aug-2002]
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9581
Abstract: No abstract text available
Text: 54F 74F651 54F 74F652 Transceivers Registers General Description Features These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be
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74F651
74F652
962-89558013A
54F652
96289558013A
5962-8955801LA
1-Sep-2000]
54F652SDMQB
9581
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Untitled
Abstract: No abstract text available
Text: 54LVXC4245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with TRI-STATE Outputs General Description Features The LVXC4245 is a 24-pin dual-supply, 8-bit configurable voltage interface transceiver suited for real time configurable I/O applications. The VCCA pin accepts a 5V supply level.
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54LVXC4245
LVXC4245
24-pin
5962-9862001QLA
54LVXC4245J-QML
5962-9862001QKA
54LVXC4245W
59629862001QKA
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LVXC32
Abstract: MARK* W24A
Text: 54LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with TRI-STATE Outputs General Description Features The LVXC3245 is a 24-pin dual-supply, 8-bit configurable voltage interface transceiver suited for real time configurable I/O applications. The VCCA pin accepts a 3V supply level.
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54LVXC3245
LVXC3245
24-pin
5962-9861901QLA
54LVXC3245J-QML
5962-9861901QKA
2-Sep-2000]
LVXC32
MARK* W24A
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54ABT543
Abstract: 54ABT543E-QML 54ABT543J-QML 54ABT543W-QML ABT543 E28A J24A W24C
Text: 54ABT543 Octal Registered Transceiver with TRI-STATE Outputs General Description The ’ABT543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are
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54ABT543
ABT543
Nondestru959
54ABT543
54ABT543E-QML
54ABT543J-QML
54ABT543W-QML
E28A
J24A
W24C
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Untitled
Abstract: No abstract text available
Text: 54F 74F181 4-Bit Arithmetic Logic Unit General Description Features The ’F181 is a 4-bit Arithmetic logic Unit ALU which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations It is 40% faster than the Schottky ALU and only consumes 30% as much power
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74F181
74F181PC
74F181SPC
24-Lead
24-Lead
54F181DM
54F181SDM
74F181SC
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Untitled
Abstract: No abstract text available
Text: 54ACTQ543 54ACTQ543 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs Literature Number: SNOS056 54ACTQ543 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs General Description Features The ACTQ543 is a non-inverting octal transceiver containing
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54ACTQ543
54ACTQ543
SNOS056
ACTQ543
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54LVX3383
Abstract: 54LVX3383J-QML 54LVX3383W-QML J24F W24C
Text: 54LVX3383 10-Bit Low Power Bus-Exchange Switch General Description Features The 54LVX3383 provides two sets of high-speed CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground
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54LVX3383
10-Bit
54LVX3383
54LVX3383J-QML
54LVX3383W-QML
J24F
W24C
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9821
Abstract: MAX PLUS II free alu DM74LS181N CIRCUIT DIAGRAM CNA4 C1995 DM54LS181 DM54LS181J DM54LS181W DM74LS181 DM74LS181N
Text: DM54LS181 DM74LS181 4-Bit Arithmetic Logic Unit General Description Features The ’LS181 is a 4-bit Arithmetic Logic Unit ALU which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations Y Y Y Provides 16 arithmetic operations add subtract compare double plus twelve other arithmetic operations
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DM54LS181
DM74LS181
LS181
DM54LS181J
DM54LS181W
DM74LS181N
9821
MAX PLUS II free alu
DM74LS181N CIRCUIT DIAGRAM
CNA4
C1995
DM74LS181
DM74LS181N
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74ACQ544
Abstract: 74ACTQ544 C1995
Text: 74ACQ544 54ACTQ 74ACTQ544 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs General Description Features The ’ACQ ’ACTQ544 is an inverting octal transceiver containing two sets of D-type registers for temporary storage of data flowing in either direction Separate Latch Enable and
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74ACQ544
54ACTQ
74ACTQ544
ACTQ544
20-3A
74ACQ544
74ACTQ544
C1995
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w24c
Abstract: No abstract text available
Text: June 1989 Semiconductor 93L08 Dual 4-Bit Latch General Description The 93L08 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input and active LOW Enable inputs.
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93L08
w24c
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54F657FM
Abstract: 54F657SDM 74F657SPC 75F657SC F245 F657 J24F M24B N24C
Text: 0> Ul -s| N a t i o n a l Se mi c onduc t or 54F/74F657 Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description Features The 'F657 contains eight non-inverting buffers with TRI-STATE® outputs and an 8-bit parity generator/checker.
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54F/74F657
24-pin
F280A
54F657FM
54F657SDM
74F657SPC
75F657SC
F245
F657
J24F
M24B
N24C
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