W24B
Abstract: No abstract text available
Text: 24 Lead Cerquad NS Package Number W24B All dimensions are in inches millimeters LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
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W24B04
Abstract: No abstract text available
Text: Preliminary W24B04 512K x 8 CMOS STATIC RAM 1. GENERAL DESCRIPTION The W24B04 is a normal-speed, very low-power CMOS static RAM organized as 524288 × 8 bits that operates on a wide voltage range from 2.7V to 3.6V power supply. The W24B04, W24B04-LE and W24B04-LI, can meet the requirement of various operating temperature. This device is manufactured
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W24B04
W24B04
W24B04,
W24B04-LE
W24B04-LI,
44-pin
ty798
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TSOP8
Abstract: 0105y
Text: Preliminary W24B02 256K x 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24B02 is a normal-speed, very low-power CMOS static RAM organized as 262144 x 8 bits that operates on a wide voltage range from 2.7V to 3.6V power supply. The W24B02, W24B02-LE and W24B02-LI, can meet the requirement of various operating temperature. This device is manufactured
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W24B02
W24B02,
W24B02-LE
W24B02-LI,
32-pin
TSOP8
0105y
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100336W-QMLV
Abstract: 100336FMQB 100136 100336DMQB 100336J-QMLV F100336 F336
Text: MILITARY DATA SHEET Original Creation Date: 10/30/95 Last Update Date: 10/21/96 Last Major Revision Date: 10/16/96 MN100336-X REV 2A0 4-STAGE COUNTER/SHIFT REGISTER General Description The F100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional
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MN100336-X
F100336
modulo-16
J24ERJ
P000070A
P000071A
W24BRE
100336W-QMLV
100336FMQB
100136
100336DMQB
100336J-QMLV
F336
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F100K
Abstract: J24E W24B
Text: October 19, 2009 100323 Low Power Hex Bus Driver General Description Features The 100323 is a monolithic device containing six bus drivers capable of driving terminated lines with terminations as low as 25Ω. To reduce crosstalk, each output has its own respective ground connection. Transition times were designed to be
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F100K
J24E
W24B
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F100K
Abstract: No abstract text available
Text: 100321 Low Power 9-Bit Inverter General Description The 100321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. All inputs have 50 kΩ pull-down resistors. n n n n n 2000V ESD protection Pin/function compatible with 100121
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MIL-STD-883
DS010609-1
DS010609
F100K
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F100K
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
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smd marking d2d
Abstract: No abstract text available
Text: 100304 Low Power Quint AND/NAND Gate General Description The 100304 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection Pin/function compatible with 100104
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DS100304-1
5962-9153701VXA
100304J-QMLV
100304WQMLV
5962-9153701VYA
1-Sep-2000]
smd marking d2d
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16 input multiplexer
Abstract: No abstract text available
Text: 100364 Low Power 16-Input Multiplexer General Description The 100364 is a 16-input multiplexer. Data paths are controlled by four Select lines S0–S3 . Their decoding is shown in the truth table. Output data polarity is the same as the seleted input data. All inputs have 50 kΩ pulldown resistors.
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16-Input
DS100301-1
5962-9459201MYA
5962-9459201VXA
100364J-QMLV
100364WQMLV
5962-9459201VYA
16 input multiplexer
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Untitled
Abstract: No abstract text available
Text: 100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR outputs. All inputs have 50 kΩ pull-down resistors. n n n n n Features 2000V ESD protection
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Out7000
100307DMQB
9459001MX
5962Full
9459001MYA
5962Cerdip
9459001VXA
100307J
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CS16LV40963
Abstract: BS62LV4006 sram cross reference CS18LV40963 LY6264 Hynix Cross Reference cs18lv10245 cs18lv02560 LY621024 K6X1008C2D
Text: www.ashlea.co.uk 01793 783784 Low power SRAM Cross Reference Density Configuration 64K 8Kx8 256K 32Kx8 Lyontek LY6264 LY62L64 LY62256 LY62L256 LY62256 2.7-5.5 1M 128Kx8 64Kx16 LY621024 LY62L1024 LY62L6416 Samsung K6X0808C1D K6X0808T1D K6X1008C2D K6X1008T2D
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32Kx8
LY6264
LY62L64
LY62256
LY62L256
LY62256
128Kx8
64Kx16
LY621024
LY62L1024
CS16LV40963
BS62LV4006
sram cross reference
CS18LV40963
LY6264
Hynix Cross Reference
cs18lv10245
cs18lv02560
LY621024
K6X1008C2D
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b1565
Abstract: B1565 transistor 870b 24-Pin Plastic DIP B955 transistor b1565 C1995 F100K J24E N24E
Text: 100304 Low Power Quint AND NAND Gate General Description Features The 100304 is monolithic quint AND NAND gate The Function output is the wire-NOR of all five AND gate outputs All inputs have 50 kX pull-down resistors Y Y Y Y Y Y Logic Symbol Low Power Operation
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MIL-STD-883
24-Pin
b1565
B1565 transistor
870b
24-Pin Plastic DIP
B955
transistor b1565
C1995
F100K
J24E
N24E
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b1565
Abstract: B1565 transistor E-HC C1995 F100K J24E V28A W24B Z0B Series
Text: 100370 Low Power Universal Demultiplexer Decoder General Description The 100370 universal demultiplexer decoder functions as either a dual 1-of-4 decoder or as a single 1-of-8 decoder depending on the signal applied to the Mode Control M input In the dual mode each half has a pair of active-LOW
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b37 diode
Abstract: C1995 F100K J24E M24B N24E V28A W24B 1380B
Text: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels Differential inputs allow each circuit to be used as an inverting non-inverting or differential receiver An internal reference voltage generator provides
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F100K
b37 diode
C1995
J24E
M24B
N24E
V28A
W24B
1380B
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100331DMQB
Abstract: 100331FMQB 100331J-QMLV 100331WFQMLV 100331W-QMLV 5962-9153601MXA F100331 5962-9153601vya
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/30/95 Last Update Date: 04/23/04 Last Major Revision Date: 08/21/96 MN100331-X REV 1B0 LOW POWER TRIPLE D FLIP-FLOP General Description The F100331 contains three D-type, edge-triggered master/slave flip-flops with true and
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MN100331-X
F100331
J24ERJ
P000060A
P000061A
W24BRE
M0004381
MN100331-X,
100331DMQB
100331FMQB
100331J-QMLV
100331WFQMLV
100331W-QMLV
5962-9153601MXA
5962-9153601vya
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Untitled
Abstract: No abstract text available
Text: Se mi c o n dut July 1992 t o r 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset
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Untitled
Abstract: No abstract text available
Text: A I R C H I I - D EMIC O N D U C T O R T 100351 Low Power Hex D Flip-Flop General Description Features The • 4 0 % p o w e r re d u c tio n o f th e 100151 100351 c o n ta in s s ix D -ty p e e d g e -trig g e re d , m a s te r/ s la v e flip -flo p s w ith tru e a n d c o m p le m e n t o u tp u ts , a p a ir o f
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100354 Low Power 8-Bit Register with Cut-Off Drivers General Description The 100354 contains eight D-Type edge triggered, master/ slave flip-flops with individual inputs Dn , true outputs (Qn), a clock input (CP), an output enable pin (OEN), and a com
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R T M 100302 Low Power Quint 2-Input OR/NOR Gate General Description • 2000V ESD protection The 100302 is a m onolithic quint 2 -input O R /N O R gate with com m on enable. All inputs have 50 kQ pull-dow n resistors and all outputs are buffered.
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ns108
Abstract: F100K
Text: S E M IC O N D U C T O R tm 100321 Low Power 9-Bit Inverter General Description The 100321 is a m onolithic 9-bit inverter. The device con tains nine inverting buffer gates with single input and output All inputs have 50 kQ pull-dow n resistors. • 2000V ESD protection
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MIL-STD-883
ns108
F100K
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F100K
Abstract: No abstract text available
Text: Semiconductor July 1992 100363 Low Power Dual 8-Input Multiplexer General Description Features The 100363 is a dual 8-input m ultiplexer. The D ata S elect Sn inputs determ ine w hich bit (An and Bn) w ill be prese n t ed at th e o utputs (Za and Z b respectively). The sam e bit
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MIL-STD-883
F100K
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DM74AS646
Abstract: DM74AS646NT DM74AS646WM DM74AS648NT DM74AS648WM M24B N24C
Text: E M IC D N D U C T O R t DM74AS646/DM74AS648 Octal Bus Transceiver and Register General Description This device incorporates an octal bus transceiver and an oc tal D-type register configured to enable multiplexed trans mission of data from bus to bus or internal register to bus.
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DM74AS646/DM74AS648
DM74AS646WM
DM74AS648WM
DM74ALS648NT
DM74AS646
DM74AS646NT
DM74AS648NT
M24B
N24C
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mr 6710
Abstract: DI 762 F100K
Text: EM ICDNDUCTOR t 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D -type, edge-triggered m aster/ slave flip-flops with true and com plem ent outputs, a C om mon C lock CPc , and M aster Set (MS) and M aster Reset
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ha 1555
Abstract: F100K J24E N24E 7B223
Text: S E M IC O N D U C T O R tm 100360 Low Power Dual Parity Checker/Generator General Description Features The 100360 is a dual parity checker/generator. Each half has nine inputs; the output Is HIGH when an even num ber of in puts are HIGH. One of the nine inputs la or lb has the
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