OSERDES
Abstract: oserdes2 DDR spartan6 XAPP1064 ISERDES2 oserdes2 serdes clock_generator_ddr_s8_diff ISERDES spartan 6 SP601 Clock-Generator
Text: Application Note: Spartan-6 FPGAs Source-Synchronous Serialization and Deserialization up to 1050 Mb/s XAPP1064 (v1.0) December 23, 2009 Author: NIck Sawyer Summary Spartan -6 devices contain input SerDes (ISERDES) and output SerDes (OSERDES) blocks. These primitives simplify the design of serializing and deserializing circuits, while allowing
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XAPP1064
OSERDES
oserdes2 DDR spartan6
XAPP1064
ISERDES2
oserdes2
serdes
clock_generator_ddr_s8_diff
ISERDES spartan 6
SP601
Clock-Generator
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ISERDES
Abstract: ISERDES spartan 6 OSERDES SRL16 XAPP721
Text: Application Note: Virtex-4 FPGAs R XAPP721 v2.2 July 29, 2009 High-Performance DDR2 SDRAM Interface Data Capture Using ISERDES and OSERDES Author: Maria George Summary This application note describes a data capture technique for a high-performance DDR2 SDRAM interface. This technique uses the Input Serializer/Deserializer (ISERDES) and Output
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XAPP721
64-Bit
72-Bit
ISERDES
ISERDES spartan 6
OSERDES
SRL16
XAPP721
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XAPP1064
Abstract: BUFIO2 ISERDES2 OSERDES iodelay ISERDES spartan 6 serdes oserdes2 DDR spartan6 ISERDES oserdes2
Text: Application Note: Spartan-6 FPGAs Source-Synchronous Serialization and Deserialization up to 1050 Mb/s XAPP1064 (v1.1) June 3, 2010 Author: NIck Sawyer Summary Spartan -6 devices contain input SerDes (ISERDES) and output SerDes (OSERDES) blocks. These primitives simplify the design of serializing and deserializing circuits, while allowing
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XAPP1064
XAPP1064
BUFIO2
ISERDES2
OSERDES
iodelay
ISERDES spartan 6
serdes
oserdes2 DDR spartan6
ISERDES
oserdes2
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ISERDES
Abstract: OSERDES XAPP721 SRL16
Text: Application Note: Virtex-4 FPGAs R XAPP721 v2.0 March 12, 2007 High-Performance DDR2 SDRAM Interface Data Capture Using ISERDES and OSERDES Author: Maria George Summary This application note describes a data capture technique for a high-performance DDR2
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XAPP721
64-Bit
72-Bit
ISERDES
OSERDES
XAPP721
SRL16
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UG365
Abstract: UG-361 XC6VLX240T UG365 XC6VLX240T-1FFG1156 DSP48E1 VIRTEX-6 UG362 write operation using ram in fpga xc6vlx240t VIRTEX-6 UG373 frequency detection using FPGA
Text: → 11 Virtex-6 Family Overview DS150 v2.4 January 19, 2012 Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on
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DS150
DSP48E1
UG369)
UG368)
XC6VLX760.
UG370)
UG373)
UG365
UG-361
XC6VLX240T UG365
XC6VLX240T-1FFG1156
VIRTEX-6 UG362
write operation using ram in fpga
xc6vlx240t
VIRTEX-6 UG373
frequency detection using FPGA
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DSP48E1
Abstract: FPGA Virtex 6 LXT virtex 6 XC6VSX475T XC6VLX240T-1FFG1156 "Binary Multipliers" UG-361 virtex+6 UG366 1000BASE-X DS150
Text: 11 Virtex-6 Family Overview DS150 v2.1 November 6, 2009 Advance Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on
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DS150
UG364)
UG366)
XC6VLX760.
UG371)
XC6VHX250T
XC6VHX380T
FF1154
DSP48E1
UG369)
FPGA Virtex 6 LXT
virtex 6 XC6VSX475T
XC6VLX240T-1FFG1156
"Binary Multipliers"
UG-361
virtex+6
UG366
1000BASE-X
DS150
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Untitled
Abstract: No abstract text available
Text: Spartan-6 FPGA Clocking Resources User Guide UG382 v1.8 June 20, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
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UG382
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Abstract: No abstract text available
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.6 April 17, 2013 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
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DS181
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Untitled
Abstract: No abstract text available
Text: Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics DS183 v1.18 November 26, 2013 Product Specification Introduction Virtex -7 T and XT FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance.
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DS183
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Untitled
Abstract: No abstract text available
Text: 7 Series FPGAs Clocking Resources User Guide UG472 v1.8 August 7, 2013 The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
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UG472
5x36K
DSP48
XC7A200T
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LPDDR KINTEX 7
Abstract: SPARTAN-6 spartan6 ug384 XA6SLX75
Text: 10 XA Spartan-6 Automotive FPGA Family Overview DS170 v1.3 December 13, 2012 Product Specification General Description The Xilinx Automotive (XA) Spartan -6 family of FPGAs provides leading system integration capabilities with the lowest total cost for highvolume automotive applications. The ten-member family delivers expanded densities ranging from 3,840 to 101,261 logic cells and faster,
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DS170
UG382)
UG393)
UG394)
LPDDR KINTEX 7
SPARTAN-6
spartan6
ug384
XA6SLX75
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Untitled
Abstract: No abstract text available
Text: XA Zynq-7000 All Programmable SoC Overview DS188 v1.1 June 4, 2014 Advance Product Specification XA Zynq-7000 All Programmable SoC First Generation Architecture The XA Zynq -7000 Automotive family is based on the Xilinx All Programmable SoC architecture. These
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DS188
Zynq-7000
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dcm_sp
Abstract: oserdes2 DDR spartan6 UG382 Spartan-6 FPGA DCM_CLKGEN point-to-point mini-lvds oserdes2 XAPP469 OSERDES SP601 Spread-Spectrum
Text: Application Note: Spartan-6 FPGAs Spread-Spectrum Clock Generation in Spartan-6 FPGAs XAPP1065 v1.0 March 22, 2010 Author: Jim Tatsukawa Summary Consumer display applications commonly use high-speed LVDS interfaces to transfer video data. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)
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XAPP1065
dcm_sp
oserdes2 DDR spartan6
UG382
Spartan-6 FPGA DCM_CLKGEN
point-to-point mini-lvds
oserdes2
XAPP469
OSERDES
SP601
Spread-Spectrum
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DSP48
Abstract: DSP48A DSP48E DSP48E1 PPC405 PPC440 UG112 iodelay UG440 LX240T
Text: XPower Estimator User Guide [Guide Subtitle] [optional] UG440 v4.0 May 3, 2010 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG440
DSP48
DSP48A
DSP48E
DSP48E1
PPC405
PPC440
UG112
iodelay
UG440
LX240T
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XQ4VSX55
Abstract: xq4vlx25 XQ4VLX60-10FF668M XQ4VLX40 XQ4VFX60 xq4vlx60 XQ4VFX60-10EF672M XQ4VLX40-10FF668M XQ4VLX100 Virtex 4Q
Text: Virtex-4Q FPGA Data Sheet: DC and Switching Characteristics R DS595 v1.6 April 27, 2010 Product Specification Virtex-4Q FPGA Electrical Characteristics Defense-grade Virtex -4Q FPGAs are available in -10 speed grade and are qualified for industrial (TJ = –40°C to +100°C),
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xq4vlx25
XQ4VLX60-10FF668M
XQ4VLX40
XQ4VFX60
xq4vlx60
XQ4VFX60-10EF672M
XQ4VLX40-10FF668M
XQ4VLX100
Virtex 4Q
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iodelay
Abstract: XAPP880 OSERDES pmbus verilog FIFO18E1 ML605 ISERDES example ml605 XAPP855 samtec QSE
Text: Application Note: Virtex-6 FPGAs SFI-4.1 16-Channel SDR Interface with Bus Alignment Using Virtex-6 FPGAs XAPP880 v1.0 February 10, 2010 Author: Vasu Devunuri Summary This application note describes an SFI-4.1 reference design that implements the OIF-SFI4-01.01 interface [Ref 1], a 16-channel, source-synchronous LVDS interface operating
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XAPP880
OIF-SFI4-01
16-channel,
iodelay
XAPP880
OSERDES
pmbus verilog
FIFO18E1
ML605
ISERDES
example ml605
XAPP855
samtec QSE
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UG366
Abstract: LX760
Text: Virtex-6 FPGA Data Sheet: DC and Switching Characteristics DS152 v3.5 May 17, 2013 Product Specification Virtex-6 FPGA Electrical Characteristics Virtex -6 FPGAs are available in -3, -2, -1, and -1L speed grades, with -3 having the highest performance. Virtex-6 FPGA
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UG366
LX760
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XQ7A200T
Abstract: No abstract text available
Text: 12 Defense-Grade 7 Series FPGAs Overview DS185 v1.0 May 10, 2013 Advance Product Specification General Description Xilinx Defense-grade 7 series FPGAs comprise three FPGA families that address the complete range of system requirements, ranging from low cost,
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XQ7A200T
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UG480
Abstract: No abstract text available
Text: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics Product Specification DS181 v1.6 April 17, 2013 Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V
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XQR5VFX130-CF1752
Abstract: XQR5VFX
Text: Radiation-Hardened, Space-Grade Virtex-5QV FPGA Data Sheet: DC and Switching Characteristics DS692 v1.2 July 24, 2013 Product Specification Virtex-5QV FPGA Electrical Characteristics Radiation-hardened Virtex -5QV FPGAs are available in the -1 speed grade only. Virtex-5QV FPGA DC and AC
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DS692
DS192,
UG520,
UG190,
UG191,
XQR5VFX130-CF1752
XQR5VFX
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Abstract: No abstract text available
Text: → 9 Defense-Grade Virtex-6Q Family Overview DS155 v1.1 February 8, 2012 Product Specification General Description The Defense-Grade Virtex -6Q family provides the most advanced features in the Aerospace & Defense FPGA market and represents the 3rd generation of secure silicon architecture products from Xilinx. Virtex-6Q FPGAs are the programmable silicon foundation for
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Abstract: No abstract text available
Text: 89 Spartan-6 FPGA Data Sheet: DC and Switching Characteristics Product Specification DS162 v3.0 October 17, 2011 Spartan-6 FPGA Electrical Characteristics Spartan -6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and
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XQR4VSX55
Abstract: xqr4vlx200 Virtex-4 UG070 UG071 UG072 UG073 XQR4VFX140 Virtex-4 thermal resistance LVCMOS33
Text: Radiation-Tolerant Virtex-4 QPro-V FPGAs: DC and Switching Characteristics R DS680 v1.1 December 16, 2008 Preliminary Product Specification Virtex-4 QPro-V FPGA Electrical Characteristics Virtex -4 QPro -V FPGAs are available in -10 speed grade and qualified for military (TJ = –55° C to +125° C)
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XQR4VSX55
xqr4vlx200
Virtex-4
UG070
UG071
UG072
UG073
XQR4VFX140
Virtex-4 thermal resistance
LVCMOS33
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XAPP873
Abstract: OSERDES VHDL description for an 8-bit even/odd parity MB86065 IOL13 RAM64X1D RAMB36 Virtex-5 write operation using ram in fpga ML550
Text: Application Note: Virtex-5 FPGAs R XAPP873 v1.0 May 6, 2008 Virtex-5 FPGA Interface for Fujitsu Digital-to-Analog Converters with LVDS Inputs Author: Marc Defossez Summary This application note describes how to interface a Fujitsu MB86064 digital-to-analog
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MB86064
MB86065
XAPP873
OSERDES
VHDL description for an 8-bit even/odd parity
IOL13
RAM64X1D
RAMB36
Virtex-5
write operation using ram in fpga
ML550
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