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    74LS279 Search Results

    74LS279 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS279FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS279P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    SN74LS279ADE4 Texas Instruments Quad /S-/R latches 16-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS279ADR Texas Instruments Quad /S-/R latches 16-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS279ANE4 Texas Instruments Quad /S-/R latches 16-PDIP 0 to 70 Visit Texas Instruments Buy
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    74LS279 Price and Stock

    Texas Instruments SN74LS279AN

    IC QUAD NOT-S/NOT-R LATCH 16-DIP
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    DigiKey SN74LS279AN Tube 567 1
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    Mouser Electronics SN74LS279AN 1,063
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    Newark SN74LS279AN Bulk 626 1
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    Rochester Electronics SN74LS279AN 2,897 1
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    ComSIT USA SN74LS279AN 362
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    Chip1Stop SN74LS279AN Tube 63
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    Texas Instruments SN74LS279AD

    IC QUAD /S /R LATCH 16-SOIC
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    DigiKey SN74LS279AD Tube 389 1
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    Newark SN74LS279AD Bulk 13 1
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    Quest Components SN74LS279AD 672
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    SN74LS279AD 269
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    Rochester Electronics SN74LS279AD 6,236 1
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    Chip1Stop SN74LS279AD Tube 5
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    Rochester Electronics LLC DM74LS279M

    R-S LATCH, LOW LEVEL TRIGGERED
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    DigiKey DM74LS279M Bulk 2,219
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    onsemi DM74LS279N

    IC LATCH QUAD S/R 16-DIP
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    DigiKey DM74LS279N Tube 25
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    Rochester Electronics LLC SN74LS279D

    IC QUAD S-R LATCH
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    DigiKey SN74LS279D Bulk 2,219
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    74LS279 Datasheets (10)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LS279 Fairchild Semiconductor Quad S-R Latch Original PDF
    74LS279 Hitachi Semiconductor Quadruple S-R Latches Original PDF
    74LS279 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74LS279 Raytheon Quadruple S-R Latches Scan PDF
    74LS279 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74LS279C Unknown TTL Data Book 1980 Scan PDF
    74LS279DC Fairchild Semiconductor Quad Set-Reset Latch Scan PDF
    74LS279FC Fairchild Semiconductor Quad Set-Reset Latch Scan PDF
    74LS279M Unknown TTL Data Book 1980 Scan PDF
    74LS279PC Fairchild Semiconductor Quad Set-Reset Latch Scan PDF

    74LS279 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    751B03

    Abstract: 74ls279 of 74ls279 truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS279 QUAD SET-RESET LATCH VCC S1 R Q S1 S2 R Q 16 15 14 13 12 11 10 9 QUAD SET-RESET LATCH LOW POWER SCHOTTKY 1 2 3 4 5 6 7 8 R S1 S2 Q R S1 Q GND J SUFFIX CERAMIC CASE 620-09 16 TRUTH TABLE INPUT 1 S1 S2 R OUTPUT Q L L X H H L X L H H L H H L H


    Original
    PDF SN54/74LS279 751B03 74ls279 of 74ls279 truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    74ls279

    Abstract: diode s1 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 3S24 S211R
    Text: SN54/74LS279 QUAD SET-RESET LATCH VCC 16 S1 15 R Q 14 13 S1 12 S2 11 R 10 Q 9 QUAD SET-RESET LATCH LOW POWER SCHOTTKY 1 R 2 S1 3 S2 4 Q 5 R 6 S1 7 Q 8 GND J SUFFIX CERAMIC CASE 620-09 16 TRUTH TABLE INPUT 1 S1 S2 R OUTPUT Q L L X H H L X L H H L H H L H


    Original
    PDF SN54/74LS279 751B-03 74ls279 diode s1 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 3S24 S211R

    74ls279

    Abstract: truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS279DC
    Text: SN54/74LS279 QUAD SET-RESET LATCH VCC 16 S1 15 R Q 14 13 S1 12 S2 11 R 10 Q 9 QUAD SET-RESET LATCH LOW POWER SCHOTTKY 1 R 2 S1 3 S2 4 Q 5 R 6 S1 7 Q 8 GND J SUFFIX CERAMIC CASE 620-09 16 TRUTH TABLE INPUT 1 S1 S2 R OUTPUT Q L L X H H L X L H H L H H L H


    Original
    PDF SN54/74LS279 751B-03 74ls279 truth table NOT gate 74 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS279DC

    TC74HC279AP

    Abstract: 74LS279 TC74HC279AF of 74ls279 74LS279 equivalent
    Text: TC74HC279AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC279AP,TC74HC279AF Quad S - R Latch The TC74HC279A is a high speed CMOS QUAD S-R LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent


    Original
    PDF TC74HC279AP/AF TC74HC279AP TC74HC279AF TC74HC279A 74LS279 TC74HC279AF of 74ls279 74LS279 equivalent

    CI 7446

    Abstract: CI 74141 cI 74ls47 CI 7447 CI 7448 ci 7445 7-seg ANODE COMMON CI 74LS48 TTL 7446 BCD D147
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 i Ao A RBO a A 2 b A3 e d 1 El e 13 12 11 10 RBI f 9 E 9 15 3 2 4 m l 14 6 m Do MR TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan
    PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 54LS/74LS47 54LS/74LS48 54LS/74LS49 54LS/74LS247 54LS/74LS248 CI 7446 CI 74141 cI 74ls47 CI 7447 CI 7448 ci 7445 7-seg ANODE COMMON CI 74LS48 TTL 7446 BCD D147

    7475 D flip-flop

    Abstract: quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 74174 shift register 9374 74LS173 4 bit 3 state quad register 74LS279 D flip-flop 74175 pin
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 i Ao A R BO a A 2 b A 3 e d 1 E l RBI e 13 12 11 10 E 9 f 9 15 3 2 4 m l 14 6 m Do M R TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan
    PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 /74LS573 93L34 54LS/74LS259 93L38 54LS/74LS170 7475 D flip-flop quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 74174 shift register 9374 74LS173 4 bit 3 state quad register 74LS279 D flip-flop 74175 pin

    ci 7475

    Abstract: 74175 pin 9374 D147 93L38 74LS75 7477 D latch 74LS77 9370 DA 9370
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L 7 1 2 6 3 5 i Ao A R BO a A 2 b A 3 e d 1 E l RBI e 13 12 11 10 E 9 f 9 15 3 2 4 m l 14 6 m Do So M R TTTTTTTT 4 D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan
    PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 54S/74S175, 54LS/74LS175 54S/74S174, 54LS/74LS174 93L38 ci 7475 74175 pin 9374 D147 93L38 74LS75 7477 D latch 74LS77 9370 DA 9370

    74ls characteristics

    Abstract: 74LS279 S5427 74279 truth table NOT gate 74 N74279F N74279N N74LS279F N74LS279N S54279F
    Text: PIN CONFIGURATION 54/74279 54LS/74LS279 ORDERING CODE PIN CONF. PACKAGES See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES = + 5%; T a = 0 -C to *70"C VCC Plastic DIP Fig. A N74279N 74LS279N C eram ic DIP Fig. A N74279F


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    PDF 54LS/74LS279 N74279N N74LS279N N74279F N74LS279F S54279F S54LS279F S54279W S54LS279W 54H/74H 74ls characteristics 74LS279 S5427 74279 truth table NOT gate 74 N74279F N74279N N74LS279N S54279F

    74LS279

    Abstract: No abstract text available
    Text: 8 < > MOTOROLA SN54/74LS279 QUAD SET-RESET LATCH V cc s, R Q S2 S, R Q QUAD SET-RESET LATCH LOW POWER SCHOTTKY R S2 Si Q R Si Q f0n GND TRUTH TABLE INPUT J SUFFIX CERAMIC CASE 620-09 1 OUTPUT Si S2 R <Q L L X H H L X L H H L H H L H h H H L No Change N SUFFIX


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    PDF SN54/74LS279 751B-03 SN54LSXXXJ SN74LSXXXN SN74LSXXXD 74LS279

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series 74LS279 74LS279 10741^7*7 Quad S -K Latches • Description P -2 D N 74LS279 contains fo u r R-S flip-flop circuits. ■ Features • • • Low pow er consum ption Pa = 19mW typical Low o u tp u t im pedance Wide operating tem perature range (T a = - 2 0 to +75°C )


    OCR Scan
    PDF DN74LS DN74LS279 DN74LS279 74LS279 16-pin SO-16D) MA161.

    7475 d-flip flop

    Abstract: 7475 D flip-flop ci 7475 D134 1CN 24 12 74175 74279 9374 FLIP FLOP 7475 Register 7475
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 1 A R BO a A 2 b A 3 e d E l RBI e E 9 f 13 12 11 10 9 15 2 4 14 6 m Do M R TTTTTTTT 4 3 m i l Ao D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan
    PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 /74LS573 93L34 54LS/74LS259 93L38 54LS/74LS170 7475 d-flip flop 7475 D flip-flop ci 7475 D134 1CN 24 12 74175 74279 9374 FLIP FLOP 7475 Register 7475

    ci 74174

    Abstract: 7475 D flip-flop D flip-flop 74175 pin 74ls175 pin diagram 9374 74116 74175 ttl pin diagram 7477 D latch CI 74LS194 74174
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T TL 7 1 2 6 3 5 1 A R BO a A 2 b A 3 e d E l RBI e E 9 f 13 12 11 10 9 15 2 4 14 6 m Do M R TTTTTTTT 4 3 m i l Ao D147 54/74279, 54LS/74LS279 0146 9314, 93L14 D145 9370, 9374 So Qo 7 11 Da $3 V cc iwiEiEi[i3ii«inF5if»i


    OCR Scan
    PDF 93L14 54LS/74LS279 54LS/74LS75 93L08, 54LS/74LS77 /74LS573 93L34 54LS/74LS259 93L38 54LS/74LS170 ci 74174 7475 D flip-flop D flip-flop 74175 pin 74ls175 pin diagram 9374 74116 74175 ttl pin diagram 7477 D latch CI 74LS194 74174

    DN74LS279

    Abstract: MA161
    Text: ! 74LS279 LS TTL DN74LS Series 74LS279 Quad S - R L atches • Description P -2 D N 74LS279 contains four R-S flip-flop circuits. ■ Features • • • Low pow er co n sum ption Pd = 19mW typical Low o u tp u t im pedance Wide operating tem perature range (Ta = —20 to +75 C)


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    PDF DN74LS DN74LS279 DN74LS279 16-pin SO-16D) MA161. MA161

    Untitled

    Abstract: No abstract text available
    Text: 279 CONNECTION DIAGRAM PINOUT A /V54/74279 ^ , u '/ ° t/54LS/74LS279'?///£7 ' QUAD SET-RESET LATCH ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, Ta = 0°C to +70° C Vcc = +5.0 V ±10%, T a = -55°C to +125°C


    OCR Scan
    PDF /V54/74279 t/54LS/74LS279' 74279DC, 74LS279DC 54279DM, 54LS279DM 74279FC, 74LS279FC 54279FM, 54LS279FM

    74279

    Abstract: 74LS279DC
    Text: NATIONAL SENICOND {LOGICI OSE D | aSGllSE DDbBTVT 3 | 'T-Hkrb'l-IS 279 CONNECTION DIAGRAM PINOUT A 54/74279 54LS/74LS279 QUAD SET-RESET LATCH ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C


    OCR Scan
    PDF 54LS/74LS279 74279PC, 74LS279PC 74279DC, 74LS279DC 74279FC, 74LS279FC 54279DM, 54LS279DM 54279FM, 74279

    Untitled

    Abstract: No abstract text available
    Text: - TC74HC279AP/AF QUAD S -R LATCH The TC74HC279A is a h ig h speed CMOS QUAD S - R LATCH fa b ric a te d w ith silicon g a te C2MOS technology. It achieves the h ig h speed o peration s im ila r to equivalent L S T T L w hile m a in ta in in g the CMOS low pow er


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    PDF TC74HC279AP/AF TC74HC279A HC-471 HC-472

    74LS279PC

    Abstract: 74279PC 74LS279D 74279 dip 74LS279P 74LS279DC truth table NOT gate 74 54279DM 54279FM 54LS279DM
    Text: 279 C O N N E C T IO N D IA G R A M P IN O U T A / t / 54/74279 11140 !/5 4 L S /7 4 L S 2 7 9 ; ^ / Q U AD SET-RESET LATCH ÏS ] V cc 23 a ¡a m g n d |T O R D E R IN G C O D E : See S e ctio n 9 PIN PK G S OUT C O M M E R C IA L G R A D E M ILIT A R Y G R A D E


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    PDF V54LS/74LS279^ 74279PC, 74LS279PC 74279DC, 74LS279DC 54279DM, 54LS279DM 74279FC, 74LS279FC 54279FM, 74LS279PC 74279PC 74LS279D 74279 dip 74LS279P truth table NOT gate 74 54279DM 54279FM

    Untitled

    Abstract: No abstract text available
    Text: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES


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    PDF G01341Q 4TLS03 0G13411 HD14070B 1407IB HD14556B HD14558B HD14560B HD14562B HD14072B

    Untitled

    Abstract: No abstract text available
    Text: TC74HC279AP/AF QUAD S - R LATCH The TC74HC279A is a high speed CMOS QUAD S -R LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power dissipation. Each latch has an independent Q output^ and Set and


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    PDF TC74HC279AP/AF TC74HC279A 12ns3 TC74HC279AP/AF-3 TC74HC279AP/AF-4

    Untitled

    Abstract: No abstract text available
    Text: TOSHIBA LOGIC/MEMORY IME D | Ei G T ? a 4 ä 0 0 1 ä 2 ? l b l T-4k-cr?~is TC74HC279P/F QUAD S-R The TC74HC279 is a high speed CMOS QUAD S-R LATCH fabricated with silicon gate C2M0S technology.


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    PDF TC74HC279P/F TC74HC279 -----------------------------TC74HC279P/F T-Qla-Ol-15

    74LS279 equivalent

    Abstract: 16PIN 74LS279 TC74HC279AF TC74HC279AP
    Text: TOSHIBA TC74HC279AP/AF TO SH IBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC279AP, TC74HC279AF QUAD S - R LATCH The TC74HC279A is a high speed CMOS QUAD S - R LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent


    OCR Scan
    PDF TC74HC279AP/AF TC74HC279AP, TC74HC279AF TC74HC279A 16PIN DIP16-P-300-2 75MAX 735TYP 74LS279 equivalent 74LS279 TC74HC279AF TC74HC279AP

    CI 7474

    Abstract: CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 ui 9 D UJ 5 -=pi (3 J Q 2 — J SD 0 CP Z o (3 11 4 K Ä 0 Co “LT in > _6 12 CP 3 -0 14 K Co ° 7 o-i- CP 13 —c K Cd °


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    PDF 54S/74S109, 54LS/74LS109 54H/74H74, 54S/74S74, 54LS/74LS74 54H/74H73, 54LS/74LS279 93L14 54LS/74LS196 54LS/74LS197 CI 7474 CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107

    C350AVB

    Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
    Text: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices


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    PDF 37MT7bH 74LS175 74LS181 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A C350AVB full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder

    74hc279

    Abstract: No abstract text available
    Text: r z j SG S TH O M SO N *7# fflDMO IIL[i g»)RDO i M54HC279 M74HC279 QUAD S - R LATCH • HIGH SPEED tPD = 13 ns (TYP.) at VCc = 5V ■ LOW POWER DISSIPATION lCc = 2 /iA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V NIH = V n i l = 28 % VCc (MIN.) ■ OUTPUT DRIVE CAPABILITY


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    PDF M54HC279 M74HC279 54/74LS279 M54HC279 M74HC279 M54/74HC279 74hc279