VLSI DESIGN PHYSICAL VERIFICATION Search Results

VLSI DESIGN PHYSICAL VERIFICATION Result Highlights (5)

Part	Manufacturer	Description
DE6B3KJ151KA4BE01J	Murata Manufacturing Co Ltd	Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive
DE6B3KJ471KB4BE01J	Murata Manufacturing Co Ltd	Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive
DE6E3KJ152MN4A	Murata Manufacturing Co Ltd	Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive
DE6B3KJ101KA4BE01J	Murata Manufacturing Co Ltd	Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive
DE6B3KJ331KB4BE01J	Murata Manufacturing Co Ltd	Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive

VLSI DESIGN PHYSICAL VERIFICATION Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
vlsi technology Abstract: vlsi design physical verification ATM circuit diagram Alarm indication signal Text: Networking Communications VNS67200 ATM Quad UNI Four channel single-chip ATM physical layer I/O device OVERVIEW The VNS67200 ATM Quad User Network Interface Quad UNI from VLSI is a four channel single-chip ATM physical layer I/O device designed for use in ATM Local Area Network (LAN)	Original	PDF	VNS67200 PB-VNS67200QUAD/UNI vlsi technology vlsi design physical verification ATM circuit diagram Alarm indication signal
tsmc cmos 0.13 um Abstract: digital to analog converter vhdl coding vlsi design physical verification 12 bit DAC VHDL CODE N-7075 vhdl coding for analog to digital converter IFSR10 TSMC 0.13 um CMOS Text: PRELIMINARY PRODUCT SPECIFICATION nDA10400-13a 10-bit 400 MSPS Digital-to-Analog Converter IP FEATURES • • • • • 10-bit Current Output Transmit DAC Up to 400 MSPS Update Rate Single 1.2 V Power Supply Complementary Current Outputs 1 – 10 mA Adjustable Full Scale Current	Original	PDF	nDA10400-13a 10-bit nDA10400-13a N-7075 tsmc cmos 0.13 um digital to analog converter vhdl coding vlsi design physical verification 12 bit DAC VHDL CODE vhdl coding for analog to digital converter IFSR10 TSMC 0.13 um CMOS
TSMC 0.18 um CMOS Abstract: 0.18-um CMOS technology characteristics tsmc 0.18 flash tsmc cmos 0.18 um AD8138 AD8351 N-7075 vhdl coding for analog to digital converter verilog code for adc verilog code of analog mixed mode Text: PRELIMINARY PRODUCT SPECIFICATION nAD10110-18a 10-bit 110 MSPS Analog-to-Digital Converter IP FEATURES • • • • • • 10-bit ADC Up to 110 MSPS Conversion Rate Single 1.8 V Power Supply 1.5 V p-p Differential Input Excellent Dynamic Performance 59 dBFS SNR at FIN = 10 MHz	Original	PDF	nAD10110-18a 10-bit nAD10110-18a N-7075 TSMC 0.18 um CMOS 0.18-um CMOS technology characteristics tsmc 0.18 flash tsmc cmos 0.18 um AD8138 AD8351 vhdl coding for analog to digital converter verilog code for adc verilog code of analog mixed mode
TSMC 0.18 um CMOS Abstract: TSMC rf cmos 0.18 um IFSR15 N-7075 cmos tsmc 0.18 1/TSMC rf cmos 0.18 um Text: PRELIMINARY PRODUCT SPECIFICATION nDA10200x2-18a Dual 10-bit 200 MSPS Digital-to-Analog Converter IP FEATURES • • • • • • OPM[2:0] CLK Dual 10-bit Current Output Transmit DAC Up to 200 MSPS Update Rate Single 1.8 V Power Supply Complementary Current Outputs	Original	PDF	nDA10200x2-18a 10-bit nDA10200x2-18a N-7075 TSMC 0.18 um CMOS TSMC rf cmos 0.18 um IFSR15 cmos tsmc 0.18 1/TSMC rf cmos 0.18 um
verilog code pipeline square root Abstract: AD8138 AD8351 N-7075 tsmc cmos 0.13 um tsmc cmos 0.13 um ADC vhdl coding pipeline adc digital error correction TSMC Flash IP Text: PRELIMINARY PRODUCT SPECIFICATION nAD10120-13a 10-bit 120 MSPS Analog-to-Digital Converter IP FEATURES • • • • • • 10-bit ADC Up to 120 MSPS Conversion Rate Single 1.2 V Power Supply 1.0 V p-p Differential Input Excellent Dynamic Performance 59 dBFS SNR at FIN = 10 MHz	Original	PDF	nAD10120-13a 10-bit nAD10120-13a N-7075 verilog code pipeline square root AD8138 AD8351 tsmc cmos 0.13 um tsmc cmos 0.13 um ADC vhdl coding pipeline adc digital error correction TSMC Flash IP
tsmc cmos 0.13 um Abstract: N-7075 Text: PRELIMINARY PRODUCT SPECIFICATION nDA10400x2-13a Dual 10-bit 400 MSPS Digital-to-Analog Converter IP FEATURES • • • • • DIGITAL CONTROL OPM[2:0] CLK0 IOUT0 LATCH • Dual 10-bit Current Output Transmit DAC Up to 400 MSPS Update Rate Single 1.2 V Power Supply	Original	PDF	nDA10400x2-13a 10-bit nDA10400x2-13a N-7075 tsmc cmos 0.13 um
TSMC 0.18 um CMOS Abstract: vhdl coding for analog to digital converter adc vhdl cmos tsmc 0.18 0.18-um CMOS technology characteristics TSMC 0.18 um CMOS silicon AD8138 AD8351 N-7075 vlsi design physical verification Text: PRELIMINARY PRODUCT SPECIFICATION nAD12110-18a 12-bit 110 MSPS Analog-to-Digital Converter IP FEATURES • • • • • • 12-bit ADC Up to 110 MSPS Conversion Rate Single 1.8 V Power Supply 1.5 V p-p Differential Input Excellent Dynamic Performance 67 dBc SNR at FIN = 10 MHz	Original	PDF	nAD12110-18a 12-bit nAD12110-18a N-7075 TSMC 0.18 um CMOS vhdl coding for analog to digital converter adc vhdl cmos tsmc 0.18 0.18-um CMOS technology characteristics TSMC 0.18 um CMOS silicon AD8138 AD8351 vlsi design physical verification
vms310 Abstract: No abstract text available Text: Advanced Computing VMS310 OVERVIEW VLSI’s VMS310 is a unique design that offers a complete, versatile system-ona-chip cryptographic engine. As well as providing data encryption, public key management plus many other cryptographic support functions, the VMS310	Original	PDF	VMS310 VMS310 PB-VMS310
MIL-HDBK-454 Abstract: EIA-567 MIL-STD-961A MIL-STD-1840 vhdl code for floating point adder MIL-HDBK-454M EIA-548 MIL-STD-961 EIA-567-A DI-EGDS-80811 Text: METRIC NOTICE OF CHANGE MIL-HDBK-62 NOTICE 1 26 September 2002 DEPARTMENT OF DEFENSE HANDBOOK DOCUMENTATION OF DIGITAL ELECTRONIC SYSTEMS WITH VHDL TO ALL HOLDERS OF MIL-HDBK-62: 1. THE FOLLOWING PAGES OF MIL-HDBK-62 HAVE BEEN REVISED AND SUPERSEDE THE PAGES	Original	PDF	MIL-HDBK-62 MIL-HDBK-62: MIL-HDBK-62 MIL-HDBK-454 EIA-567 MIL-STD-961A MIL-STD-1840 vhdl code for floating point adder MIL-HDBK-454M EIA-548 MIL-STD-961 EIA-567-A DI-EGDS-80811
PT6045 Abstract: VSC370 PT6005 Text: V L S I TECHNOLOGY INC 4 7E D • =1300347 V L S I Tech n o lo gy , in c . 0000070 7 ■ VTI 'T - v z - m VSC370 SERIES 1-MICRON HIGH-DENSITY STANDARD CELL LIBRARY FEATURES • Advanced 0.85-micron channel length, 1.0-micron gate length silicon gate CMOS technology	OCR Scan	PDF	VSC370 85-micron 000fiö T-42-41 PT6045 PT6005
PT6005 Abstract: VSC300 Text: V L S I TECHNOLOGY INC IflE D T3ÔÔ347 üüü32bfl 4 VLSI T ech n o lo gy, inc. VSC300 SERIES 1-MICRON HIGH-PERFORMANCE STANDARD CELL FEATURES • A dvanced 1-m icron draw n gate length , silicon gate C M O S , 2 -la ye r m etal technology • Fast design tu rn-around tim e w ith	OCR Scan	PDF	32bfl VSC300 PT6005
PT6042 Abstract: No abstract text available Text: V L S I TECHNOLOGY I NC H7E J> T3flfl347 D a 0 ñ ñ 2 2 7 V L S I Tech n o lo gy , in c . - r - m PRELIMINARY VTI - m VSC450 SERIES O.8-MICRON HIGH-PERFORMANCE STANDARD CELL LIBRARY FEATURES • Advanced 0.7-micron channel length, 0.8-micron drawn gate length silicon	OCR Scan	PDF	T3flfl347 VSC450 T-42-41 PT6042
ST CHN 021 Abstract: 13003 PT6005 PT6001 Text: V L S I TECHNOLOGY INC IflE D VLSI T ech n o lo g y T36Ô347 DGD3E7ti 3 in c . VSC320 SERIES 1-MICRON HIGH-DENSITY STANDARD CELL FEATURES • A dvanced 1-m icron drawn gate length , silicon gate C M O S , 2-layer metal technology • Fast design tu rn-around tim e w ith	OCR Scan	PDF	VSC320 ST CHN 021 13003 PT6005 PT6001
nd02d2 Abstract: No abstract text available Text: V L S I Technology, in c . PRELIMINARY VGC450/VGC453 LIBRARY 0.8-MICRON GATE ARRAY SERIES FEATURES • Advanced 0.7-micron effective channel length , 0.8-micron (drawn gate length) silicon gate CMOS technology • Fully integrated with COMPASS Design Automation's ASIC Design	OCR Scan	PDF	VGC450/VGC453 VGC450/453 nd02d2

integrated circuit TL 2262 Abstract: PT6042 180 nm CMOS standard cell library Synopsys compass ic ND02D2 0.03 um CMOS technology VSC470 Text: V L S I TECHNOLOGY INC M7E D VTI V L S I T ech n o lo g y , in c . T - m PRELIMINARY - m VSC470 SERIES 0.8-MICRON HIGH-DENSITY STANDARD CELL LIBRARY FEATURES • Advanced 0.7-micron channel length, 0.8-micron drawn gate length silicon gate CMOS technology	OCR Scan	PDF	VSC470 integrated circuit TL 2262 PT6042 180 nm CMOS standard cell library Synopsys compass ic ND02D2 0.03 um CMOS technology
PT6042 Abstract: VGC453 model values for 0.18 micron technology cmos nd02d2 Text: V L S I TECHNOLOGY INC T3aa3M? oooaaio □ M7E D V L S I T echn o lo gy , in c . VTI ' PRELIMINARY -0 9 VGC450/VGC453 LIBRARY O.8-MICRON GATE ARRAY SERIES FEATURES • Advanced 0.7-micron effective channel length , 0.8-micron (drawn gate length) silicon gate CMOS	OCR Scan	PDF	VGC450/VGC453 VGC453 VGC450 PT6042 model values for 0.18 micron technology cmos nd02d2
130 nm CMOS standard cell library Abstract: 180 nm CMOS standard cell library Synopsys 130 nm CMOS standard cell library ST C4002-1 VGC450/VGC453 Text: V L S I Tech n o lo gy , in c . oec t a PRELIMINARY VGC450/VGC453 LIBRARY O.8-MICRON GATE A R R A Y S E R IE S FEATURES • Advanced 0.7-micron effective channel length , 0.8-micron (drawn gate length) silicon gate CMOS technology • Fully integrated with COMPASS	OCR Scan	PDF	VGC450/VGC453 VGC453 VGC450 130 nm CMOS standard cell library 180 nm CMOS standard cell library Synopsys 130 nm CMOS standard cell library ST C4002-1
full subtractor circuit using xor and nand gates Abstract: vhdl code for multiplexer 64 to 1 using 8 to 1 8 BIT ALU design with vhdl code using structural ALU 74181 verilog verilog code for 64 bit barrel shifter full subtractor implementation using 4*1 multiplexer 4 BIT ALU design with vhdl code using structural 32 bit ALU vhdl code full subtractor using NOR gate for circuit diagram alu 74181 pin diagram Text: V L S I T E C H N O L O G Y INC 47E D MÊ 1 3 0 0 3 4 7 VLSI T ech n o lo g y , in c. 000ñ7ñb 7 • VTI t . ¥ 2 ,v / VDP370 SERIES 1-MICRON DATAPATH COMPILER LIBRARY FEATURES • Compiles to an optimized layout for cell-based designs or to a portable netlist for gate array or standard cell	OCR Scan	PDF	VDP370 VSC300 full subtractor circuit using xor and nand gates vhdl code for multiplexer 64 to 1 using 8 to 1 8 BIT ALU design with vhdl code using structural ALU 74181 verilog verilog code for 64 bit barrel shifter full subtractor implementation using 4*1 multiplexer 4 BIT ALU design with vhdl code using structural 32 bit ALU vhdl code full subtractor using NOR gate for circuit diagram alu 74181 pin diagram
VGT300039 Abstract: PT6045 VGT300022 PT6005 Text: V L S I TECHNOLOGY INC 47 E D T3flfl34? n o n a T T a V L S I Tech n o lo gy , in c . 3 VTI T -H Z -d -C R VGT350/VGT353 LIBRARY I.O-MICRON GATE ARRAY SERIES FEATURES • Advanced 0.85-micron channel length, 1.0-micron gate length silicon gate CMOS technology	OCR Scan	PDF	T3flfl34? VGT350/VGT353 85-micron VGT350/353 VGT300039 PT6045 VGT300022 PT6005
transistor t6055 Abstract: C6052P T6055 VGT300077 NAND Micron PT6001 KT 829 PC6D00 Text: V L S I TECHNOLOGY INC 1ÍE I 13afl3M7 D0G3SÖ4 S V L S I T echnology , in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES DESCRIPTION ADVANCED DESIGN TOOLS • Advanced 1.0 m icron drawn) silicon gate technology The VGT300 Series of high-performance gate arrays is fabricated on an	OCR Scan	PDF	13afl3M7 VGT300 transistor t6055 C6052P T6055 VGT300077 NAND Micron PT6001 KT 829 PC6D00
V/VGT200017 Abstract: No abstract text available Text: VLSI T ec h n o lo g y in c . GATE ARRAY PRODUCTS GATE ARRAY BASES FEATURES DESCRIPTION • High reliability - over 2000 V protection against Electrostatic Discharge ESD VLSI Technology’s VGT Series of high-performance and hlgh-density gate arrays utilize the Company’s	OCR Scan	PDF
R/CHN 041 diode Abstract: No abstract text available Text: V L S I Te c h n o l o g y in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES ^ s • Advanced f.O microij/idrawn silicon gate'technutbgy • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency	OCR Scan	PDF	VGT300 R/CHN 041 diode
full subtractor circuit using nand gates Abstract: pt6021 PC6D10 PT6041-5 VGT200 PT6011 subtractor using TTL CMOS PT6005 PT6021-5 Text: s I TECHNOLOGY INC IflE =1300347 00032^2 1 • V LSI T e c h n o lo g y , in c. T~ 42-ll-C^ VAAST-INTELLIGENCE VGT200M SERIES GOVERNMENT PRODUCTS DIVISION CONTINUOUS GATE™ TECHNOLOGY Î3-M IC R 0N GATE ARRAY SERIES DESCRIPTION FEATURES Extensive Portable retargetable	OCR Scan	PDF	VGT200M full subtractor circuit using nand gates pt6021 PC6D10 PT6041-5 VGT200 PT6011 subtractor using TTL CMOS PT6005 PT6021-5
VLSI Technology Abstract: kt 714 schematic transistor modul trigger pt6005 vlsi design physical verification VGT300 "VLSI Technology Inc." PT6055 GAH 521 fabrimex Text: V L S I T ec h n o lo g y , in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES s • Advanced f.O microp/fdrawn silicon gate'techrrology • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency	OCR Scan	PDF	VGT300 VLSI Technology kt 714 schematic transistor modul trigger pt6005 vlsi design physical verification "VLSI Technology Inc." PT6055 GAH 521 fabrimex

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VLSI DESIGN PHYSICAL VERIFICATION Search Results

VLSI DESIGN PHYSICAL VERIFICATION Result Highlights (5)

VLSI DESIGN PHYSICAL VERIFICATION Datasheets Context Search

vlsi technology

tsmc cmos 0.13 um

TSMC 0.18 um CMOS

TSMC 0.18 um CMOS

verilog code pipeline square root

tsmc cmos 0.13 um

TSMC 0.18 um CMOS

vms310

MIL-HDBK-454

PT6045

PT6005

PT6042

ST CHN 021

nd02d2

integrated circuit TL 2262

PT6042

130 nm CMOS standard cell library

full subtractor circuit using xor and nand gates

VGT300039

transistor t6055

V/VGT200017

R/CHN 041 diode

full subtractor circuit using nand gates

VLSI Technology