INF-8074
Abstract: No abstract text available
Text: AFBR-57J9AMZ Digital Diagnostic SFP, 850nm 6.144 Gb/s, RoHS OBSAI/CPRI Compatible Optical Transceiver Data Sheet Description Features Avago’s AFBR-57J9AMZ optical transceiver supports high speed serial links over multimode optical fiber at signaling rates up to 7.4 Gb/s for wireless base station applications involving the OBSAI or CPRI protocols, as well
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AFBR-57J9AMZ
850nm
AFBR-57J9AMZ
INF-8074
SFF-8472
21CRF
AV02-3648EN
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TCO-2112
Abstract: AD9516
Text: 14-Output Clock Generator AD9516-5 FEATURES APPLICATIONS Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers
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14-Output
AD9516-5
AD9516-51
64-Lead
CP-64-4)
AD9516-5BCPZ
AD9516-5BCPZ-REEL71
AD9516-5/PCBZ1
TCO-2112
AD9516
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ADSST-1803
Abstract: ADSST modem conexant analog daa microcontroller based caller id RJ11 to RS232 ttl V.34 Modem ADSST-1804 RJ-11 to DB9 telindus digital modem v.92 v.90
Text: Standalone Embedded Modems COMPLETELY INTEGRATED STANDALONE V.32/V.34/V.90 ATS MODEM CHIPSETS AND CODE • Modem Error Correction and Compression Layer 2 Protocols can Execute on DSP or on Microcontroller. HIGHLIGHTS • Complete Solution Includes DSP, DAA and Modem
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CTR21
DevADSST-V34ATS-1
ADSST-V90ATS-1
D-81373
ADSST-1803
ADSST modem
conexant analog daa
microcontroller based caller id
RJ11 to RS232 ttl
V.34 Modem
ADSST-1804
RJ-11 to DB9
telindus
digital modem v.92 v.90
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7655a
Abstract: CD2481 CL-CD2231 CL-CD2401 CL-CD2431 CL-CD2481 3C3EW CD240 BW-190
Text: CL-CD2481 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
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CL-CD2481
60-MHz
32-bit
16-bit
7655a
CD2481
CL-CD2231
CL-CD2401
CL-CD2431
CL-CD2481
3C3EW
CD240
BW-190
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Untitled
Abstract: No abstract text available
Text: SP503 Multiprotocol Transceiver • Single-Chip Serial Transceiver Supports Industry-Standard ■ Software-Selectable Protocols: — RS-232 V.28 — RS-422A (V.11, X.27) — RS-449 — RS-485 — V.35 — EIA-530 ■ Programmable Selection of Interface
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SP503
RS-232
RS-422A
RS-449
RS-485
EIA-530
SP503
RS-449,
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RFC-1055
Abstract: CL-CD2231 CL-CD2401 CL-CD2431 CL-CD2481 PQFP-100 Package footprint
Text: CL-CD2481 Product Bulletin FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel Communications Controller ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
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CL-CD2481
60-MHz
32-bit
16-bit
RFC-1055
CL-CD2231
CL-CD2401
CL-CD2431
CL-CD2481
PQFP-100 Package footprint
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circuit diagram of PAM transmitter and receiver
Abstract: PAM-5 17-LEVEL 1000base high speed line driver GMII layout
Text: Preliminary - Content Subject to Change L80601 Ultra Low Power 10/100/1000 Mbits/s PHY Preliminary Datasheet The L80601 is a full-featured Physical Layer PHY transceiver with integrated Physical Media Dependent (PMD) sublayers to support 10BASE-T, 100BASE-TX, and 1000BASE-T Ethernet protocols.
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L80601
10BASE-T,
100BASE-TX,
1000BASE-T
DB08-000187-01
circuit diagram of PAM transmitter and receiver
PAM-5
17-LEVEL
1000base high speed line driver
GMII layout
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24C02 sot
Abstract: 24c02 wp reset CAT24AA02TDI-GT3 CAT24AA02TDI-GT3 marking
Text: CAT24AA01, CAT24AA02 1-Kb and 2-Kb I2C CMOS Serial EEPROM Description The CAT24AA01/24AA02 are 1−Kb and 2−Kb CMOS Serial EEPROM devices internally organized as 128x8/256x8 bits. They feature a 16−byte page write buffer and support the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocols.
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CAT24AA01,
CAT24AA02
CAT24AA01/24AA02
128x8/256x8
16-byte
CAT24C01/24C02,
CAT24AA01/02
CAT24AA01/D
24C02 sot
24c02 wp reset
CAT24AA02TDI-GT3
CAT24AA02TDI-GT3 marking
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finisar cwdm i2c
Abstract: finisar i2c ftl APD 1550 nm AN-2030 AT24C01A IEC-825
Text: Finisar Product Specification Multi-Rate CWDM GBIC Transceiver with APD Receiver FTL-1621-XX PRODUCT FEATURES • All Metro data protocols from 125Mb/s to 2.7 Gb/s • RoHS compliant and Lead Free • Standard GBIC footprint • Uncooled CWDM-rated DFB laser transmitter
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FTL-1621-XX
125Mb/s
FTL-1621-xx
Point-to-Point05.
AN-2030:
AT24C01A/02/04/08/16
IEEE802
14xx/15xx/16xx
finisar cwdm i2c
finisar i2c ftl
APD 1550 nm
AN-2030
AT24C01A
IEC-825
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iSO 15765
Abstract: No abstract text available
Text: ELM329 CAN Interpreter Description Features Since 1996, most vehicles have been required to monitor their own emissions performance and to report on it through an On-Board Diagnostics OBD port. Initially, several different protocols were used for the transfer of OBD data, but since the 2008
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ELM329
ELM329
J1939
J1939,
RS232
ELM329DSC
iSO 15765
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SCSI 100 connector
Abstract: SCSI 2 100 pin connector SCSI 50 pin connector PICMG 2.0 100 pin scsi
Text: PXI-8210 Fast Ethernet and Ultra Wide SCSI Interface PXI-8210 Fast Ethernet LAN interface 100BaseTX and 10BaseT protocols RJ-45 connector with integrated LEDs Wide Ultra SCSI interface Compatible with SCSI-1, SCSI-2, and SCSI-3 16-bit Wide Ultra SCSI transfers up
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PXI-8210
100BaseTX
10BaseT
RJ-45
16-bit
68-position
50-position
PXI-8210
68-pin
SCSI 100 connector
SCSI 2 100 pin connector
SCSI 50 pin connector
PICMG 2.0
100 pin scsi
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100BASE-FX
Abstract: DP83843 DP83843VJE t424
Text: July 1998 DP83843 PHYTER General Description Features The DP83843 is a full feature Physical Layer device with integrated PMD sublayers to support both 10BASE-T and 100BASE-X Ethernet protocols. • IEEE 802.3 ENDEC with AUI/10BASE-T transceivers and filters built-in
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DP83843
10BASE-T
100BASE-X
AUI/10BASE-T
100BASE-TX
100BASE-FX
com-180-530
DP83843VJE
t424
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80386EX intel microprocessor
Abstract: 80386EX National Instruments Devicenet protocol Allen Bradley devicenet object
Text: DeviceNet Master Interfaces AT-DNET, PCI-DNET, PCMCIA-DNET AT-DNET, PCI-DNET, PCMCIA-DNET High-performance Intel 80386EX microprocessor 500 V optically isolated physical layer Pluggable screw terminal connector Combicon style Master (scanner) and slave protocols for
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80386EX
winDNBT-16
80386EX intel microprocessor
80386EX
National Instruments
Devicenet protocol
Allen Bradley devicenet object
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RC531
Abstract: EN300330 RC500 RC632 ISO14443 mifare rc500 MF EV800 so32 mm EV700 RC400
Text: ISO 14443 ISO 15693 Product Features Operating distance typ. [mm] Antenna FIFO depth [byte] Host interface RF Interface Analog interface Carrier frequency [MHz] Modulation Baudrate ISO 14443 [kbit/s] Baudrate ISO 15693 [kbit/s] Standards & Protocols ISO 14443 A
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RC500
RC530
EN300330
RC531
EN300330
RC500
RC632
ISO14443
mifare rc500
MF EV800
so32 mm
EV700
RC400
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NAT4882
Abstract: 777126
Text: GPIB Interface to VXIbus GPIB-VXI/C Features Overview The GPIB-VXI/C is a Slot 0 Resource Manager module for the VXIbus. The GPIB-VXI/C links the industry-standard IEEE 488 bus and the VXIbus by transparently converting GPIB signals and protocols to VXIbus signals and protocols.
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25-pin
NAT4882
777126
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QSFP passive connector xaui
Abstract: Optical SAS QSFP QSFP optical active cable QLX4600LIQSB QLX4600LIQSR QLX4600LIQT7 SDD11 Optical SAS QSFP oob marking SCC11 QSFP PCB design
Text: QLx4600-SL30 Quad Lane Extender FEATURES GENERAL DESCRIPTION Supports data rates up to 6.25Gb/s The QLx4600-SL30 is a settable quad receive-side equalizer with extended Low power 78mW per channel functionality for advanced protocols operating with line rates up to 6.25Gb/s
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QLx4600-SL30
25Gb/s
10GBase-CX4.
QLx4600-SL30
500ps)
QSFP passive connector xaui
Optical SAS QSFP
QSFP optical active cable
QLX4600LIQSB
QLX4600LIQSR
QLX4600LIQT7
SDD11
Optical SAS QSFP oob
marking SCC11
QSFP PCB design
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Untitled
Abstract: No abstract text available
Text: HI-15530 March 2007 5V / 3.3V Manchester Encoder / Decoder GENERAL DESCRIPTION FEATURES The HI-15530 is a high performance CMOS integrated circuit designed to meet the requirements of MIL-STD-1553 and similar Manchester II encoded, time division multiplexed serial data protocols. The HI-15530 contains
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HI-15530
MIL-STD-1553
HI-1567
24-pin
HD15530
MAS15530
ACT15530
HI-15530
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Modem Interface Type D 9091 0210
Abstract: Carlo Gavazzi Group relay SW01 D9091SW013 carlo gavazzi c 115 5a
Text: Du line Modem Interface Type D 9091 0210 Fieldbus Installationbus • 5 operation modes • Public line remote • Public line central • Private line master • Private line slave • RS 232 interface • Baud rate: 300, 1200, 2400, 4800, 9600 Baud • Protocols: Hayes AT and CCITT V.25 bis
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232-25M/25F
D9080)
Modem Interface Type D 9091 0210
Carlo Gavazzi Group relay
SW01
D9091SW013
carlo gavazzi c 115 5a
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EIA-530A
Abstract: RS-449 SP505 SP505A SP505B
Text: SP505 WAN Multi-Mode Serial Transceiver • +5V Only Operation ■ Seven 7 Drivers and Seven (7) Receivers ■ Driver and Receiver Tri-state Control ■ Internal Transceiver Termination Resistors for V.11 and V.35 Protocols ■ Loopback Self-Test Mode
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SP505
RS-232
21/RS-422
EIA-530
EIA-530A
RS-449
RS-485
SP505A
10Mbps
SP505B
EIA-530A
RS-449
SP505
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"D-Subminiature Connector" 62 Pin
Abstract: 7500 IC 14 PIN rs423 pinout d-sub TTL / RS 422 converts RS-422A RS423 RS-423 RS-449 SP502
Text: SP502 Multi–Mode Serial Transceiver • Single-Chip Serial Transceiver Supports Industry-Standard ■ Software-Selectable Protocols: — RS-232 V.28 — RS-422A (V.11, X.27) — RS-449 — RS-485 — V.35 — EIA-530 ■ Programmable Selection of Interface
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SP502
RS-232
RS-422A
RS-449
RS-485
EIA-530
SP502
RS-449,
"D-Subminiature Connector" 62 Pin
7500 IC 14 PIN
rs423 pinout d-sub
TTL / RS 422 converts
RS-422A
RS423
RS-423
RS-449
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P686
Abstract: No abstract text available
Text: TOSHIBA 1. TMP68652 INTRODUCTION The TM P68652 MPCC form ats, tran sm its, and receives synchronous se ria l d ata while supporting bit-oriented protocols BOP or byte-control protocols (BC P). The p a r a lle l b u s of the M PCC re a d ily in te r fa c e s w ith th e 6 8 0 0 an d T L C S -6 8 0 0 0
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TMP68652
P68652
16-bit
P686
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Untitled
Abstract: No abstract text available
Text: System Interface Protocols Chapter 11 Introduction The following sections contain a cycle-by-cycle description of the system interface protocols for each type of R5000 processor and external request. Address and Data Cycles Cycles in which the SysAD bus contains a valid address are called
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R5000
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stk 412 -410
Abstract: stk 412 -420 stk 432 070 MM5823 STK 412 240 CIR 2262 cir 2262 af stk 412 -230 hiab STk 412 120
Text: S lB b b B R DDOtilS4 “i2 ñ m C I R wm. C L -C D 2 4 0 0 /C D 2401 •SK-H CIRRUS LOGIC Data Book FEATURES Four-Channel, Multi-Protocol Communications Controller General • Four full-duplex channels ■ All channels support async, blsync, HDLC/ SDLC, and X.21 programmable sync protocols
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000bl54
CL-CD2400/
CD2401
CL-CD2401
100-Pin
CL-CD2400/2401
CL-CD2400
10QC-I
stk 412 -410
stk 412 -420
stk 432 070
MM5823
STK 412 240
CIR 2262
cir 2262 af
stk 412 -230
hiab
STk 412 120
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pir 815
Abstract: No abstract text available
Text: PRELIMINARY & Am79C930 Advanced Micro Devices PCnet -Mobile Single Chip Wireless LAN Media Access Controller DISTINCTIVE CHARACTERISTICS • Capable of supporting the IEEE 802.11 standard draft ■ Supports the Xircom Netwave™ Media Access Control (MAC) protocols
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Am79C930
15-byte
PQT144
144-Pin
16-038-PQ
02575E7
pir 815
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