CAPACITOR CERAMICO 104
Abstract: oscilador crystal 4Mhz display 7 segmentos anodo comun display de 7 segmentos anodo comun 16 entradas y 4 salidas multiplexor memorias ram display anodo comun RELEVADORES displays de anodo comun memoria rom y ram
Text: MICROCONTROLADOR COP8 Manual de Teoría y Práctica Básica Literatura Num. XXXXXX-001 Febrero 2001 CONTENIDO OBJETIVOS … 2 CAPITULO 1 Introducción … 3 CAPITULO 2 Microcontrolador COP8 … 17 CAPITULO 3 Set de Instrucciones … 25 CAPUTILO 4 Unidades Básicas del COP8
|
Original
|
PDF
|
XXXXXX-001
CAPACITOR CERAMICO 104
oscilador crystal 4Mhz
display 7 segmentos anodo comun
display de 7 segmentos anodo comun
16 entradas y 4 salidas multiplexor
memorias ram
display anodo comun
RELEVADORES
displays de anodo comun
memoria rom y ram
|
74ACT461
Abstract: PAL20X8 8bit synchronous counter
Text: Zero Power CMOS Hard Array Logic ZHAL"24A Series ZHAL24A Evaluation #4 Features/Benefits Logic Symbol • Demonstration pattern tor Z H A L24A Series ZHAL20X8A • 8-blt counter • Three-state output ZHAL20X8A • Expandable in 8-blt increments • Equivalent to 74ACT461
|
OCR Scan
|
PDF
|
ZHAL24A
ZHAL20X8A)
74ACT461
ZHAL20X8A
PAL20X8
8bit synchronous counter
|
PALC16R
Abstract: 16R6B-2 16R4B-2
Text: PALI 6R8 Family 16L8,16R8 16R6,16R4 F eatu res/B en efits O rdering Inform ation — Newer Products • Standard 20-pin architectures PALC16R8Q-25 C Q STD T T T T T T T T T ” C PROCESSING • TTL and CMOS versions PROGRAMMABLE ARRAY LOGIC • High speed, as fast as 10 ns tPD for PAL16R8D Series
|
OCR Scan
|
PDF
|
20-pin
PAL16R8D
PALC16R8Z
PALC16R8Q-25
PAL16R8
PALC16R
16R6B-2
16R4B-2
|
67417J
Abstract: 128X9 PIS01 serial input parallel output
Text: Serializing First-In-First-O ut FIFO 6 4 x 8 /9 Memory Features/ Benefits • High-speed 28-MHz serial shift-ln/shift-out rate • 10-MHz parallel shift-in/shift-out rate • Three-state outputs with Hi-current drive 67417 Ordering Information PART NUMBER
|
OCR Scan
|
PDF
|
64x8/9
28-MHz
10-MHz
PIS01)
SIP01
67417J
128X9
PIS01
serial input parallel output
|
12L10
Abstract: 16L6 20C1
Text: 2 4 -P in P A L / H A L D e v ice s 12L10 E ^7^ 3 E =E> 3 E = t> 3 E =E> 3 E =E> 3 E = 0 3 E :£ > 3 E = 0 3 E =E> 3 E = 0 3 E = I> 3 E 3 - - AND LOGIC nnnnv - - - - 1 20L2 14L8 E 3 d E E E E E E E E E E E AND LOGIC ARRAY ¡3 =L> 3 = 0 3 =L> IE =T> 3 = o 13
|
OCR Scan
|
PDF
|
24-Pin
12L10
20L10/A
20X1O/A
20X8/A
20X4/A
20L8A/A-2/B
12L10
16L6
20C1
|
ECL10KH
Abstract: MC10H130 MC10H131
Text: ECL 10KH High-Speed Em itter-Coupled Logic Fam ily Dual Latch M C 10H 130 F eatures/ Benefits O rdering Inform ation • Propagation delay, 1 ns typical PART NUMBER PACKAGE TEMPERATURE MC10H130 J,N,NL 20 Com • Power dissipation, 155 mW typical • Noise margin 150 mV
|
OCR Scan
|
PDF
|
MC10H130
10K-compatible
MC10H130
ECL10KH
MC10H131
|
74LS794
Abstract: SN54LS793 SN54LS794 SN74LS793 SN74LS794 Q533 ls793 74LS793
Text: 8-B it Latch/Register with Readback S N 5 4 /7 4 L S 7 9 3 S N 5 4 /7 4 L S 7 9 4 Ordering Information Features/Benefits • I/O port configuration enables output data back onto input bus PART NUMBER • 8-bit data path matches byte boundaries • Ideal lor microprocessor interface
|
OCR Scan
|
PDF
|
SN54/74LS793
SN54/74LS794
LS793/4,
LS793,
74LS794
SN54LS793
SN54LS794
SN74LS793
SN74LS794
Q533
ls793
74LS793
|
mmi "tiw PROM" programming
Abstract: MMI PLE5P8 63S481 63S081 22AA PLE9P4 63s281 PLE9R8 PLE10P4 PLE11P8
Text: Programmable Logic Element RLE Circuit Family Ordering Information Features/Benefits • Programmable replacement for conventional TTL logic PLE5P8 A C N STD • Reduces 1C inventories and simplifies their control • Expedites and simplifies prototyping and board layout
|
OCR Scan
|
PDF
|
512P8
F18P08
63S481
FECP65
51A-074
SA31-2
63RA481
PLE11P4
F18P06
51A-064
mmi "tiw PROM" programming
MMI PLE5P8
63S481
63S081
22AA
PLE9P4
63s281
PLE9R8
PLE10P4
PLE11P8
|
12L10
Abstract: 16L6 20C1
Text: 24-Pin P A L / H A L Devices 12L10 E ^7^ 3 E=E> 3 E= t> 3 E =E> 3 E - AND =E> 3 LOGIC = 0 3 E - nnnnv E:£ > 3 E = 0 3 E=E> 3 E= 0 3 E= I> 3 E 1 3 20L2 14L8 d E E E E E E E E E E E ¡3 3 3 AND LOGIC ARRAY 22] =L> 3 = 0 3 =L> IE =T> 3 = o 13 3 O ID AND LOGIC
|
OCR Scan
|
PDF
|
24-Pin
12L10
20L10/A
20X1O/A
20X8/A
20X4/A
20L8A/A-2/B
12L10
16L6
20C1
|
12L10
Abstract: 16L6 20C1
Text: 2 4 -P in P A L / H A L D e v ice s 12L10 E ^7^ 3 E=E> 3 E= t> 3 E =E> 3 E - AND =E> 3 LOGIC = 0 3 E - nnnnv E:£ > 3 E = 0 3 E=E> 3 E= 0 3 E= I> 3 E 1 3 20L2 14L8 d E E E E E E E E E E E E 3 AND LOGIC ARRAY ¡3 =L> 3 = 0 3 =L> IE =T> 3 = o 13 3 O ID ¡3 1
|
OCR Scan
|
PDF
|
24-Pin
12L10
20L10/A
20X1O/A
20X8/A
20X4/A
20L8A/A-2/B
12L10
16L6
20C1
|
16L8D
Abstract: 16L8-25 2S2021 16R4 16L8 16R6 16R8 PAL16L8 PAL16R4 PAL16R6
Text: M ed iu m 2 0 S e r ie s 16L 8, 16R 8, 16R 6, 16R 4 Medium 20 Series OUTPUTS DEDICATED INPUTS COMBINATORIAL PAL16L8 PAL16R8 PAL16R6 PAL16R4 10 8 8 8 REGISTERED 8 6 I/O 2 I/O 4 I/O 8 6 4 Description The Medium 20 Series offers the four most popular PAL device architectures. It also provides the fastest PAL devices
|
OCR Scan
|
PDF
|
16L8A,
16R8A,
16R4A
PAL16L8
PAL16R8
PAL16R6
PAL16R4
2S2021
24KM2?
16L8D
16L8-25
16R4
16L8
16R6
16R8
|
Untitled
Abstract: No abstract text available
Text: Deep First-In First-Out FIFO 5 12 x9 CMOS Memory 67C 4501 - 5 0 /6 5 /8 0 Features : — Ordering Information • RAM-based FIFO PART NUMBER DESCRIPTIO N • Cycle times of 65/80/100 nanoseconds 67C 4501-50 N 5 1 2 -w o rd b y 9 -b it FIFO N C om • Asynchronous and simultaneous writes and reads
|
OCR Scan
|
PDF
|
512x9
ber87
|
PAL64R32
Abstract: No abstract text available
Text: ó V O Zero Power ZHAL64R32 CMOS Hard Array Logic ^ "s~7 ^7 001812 U.S. Pltewt 41M 899 ' f - / g :/ 2 , Features/ Benefits • Cost-effective mask-programmable complement to PAL64R32 user-programmable device • CMOS technology provides zero standby power
|
OCR Scan
|
PDF
|
ZHAL64R32
PAL64R32
|
Untitled
Abstract: No abstract text available
Text: L a rg e 2 0 R A S e rie s 16RA8 Programmable Polarity Large 20RA PAL16RA8 Description T h e P A L 1 6 R A 8 is a 20-pin reg istered a syn c h ro n o u s P A L device. It is a 20-pin v e rsio n of the original a syn c h ro n o u s P A L device, the P A L 2 0 R A 1 0 . T h is versatile d e v ice featu res pro
|
OCR Scan
|
PDF
|
16RA8
PAL16RA8)
20-pin
|
|
|
AL6001
Abstract: No abstract text available
Text: í w # d lld 'IIIU IV Ib Q N ^ 7 # . G A L 6 0 0 1 S RfflD [S©ll[Lll OT R!]D©i E2P R 0 M CMOS PROGRAMMABLE LOGIC DEVICE • ELECTRICALLY ERASABLE CELL TECHNOLOGY — Instantly reconfigurable logic — Instantly reprogrammable cells — Guaranteed 100% yields
|
OCR Scan
|
PDF
|
AI6001S
GAL6001S
GAL6001S,
GAL6001S-30HB1
AL6001
|
20L8B
Abstract: 12L10 16L6 20C1 id3-e
Text: 24-P in P A L /H A L Devices 12L10 E ^7^ 3 E=E> 3 E= t> 3 E =E> 3 E - AND =E> 3 LOGIC = 0 3 E - nnnnv E:£ > 3 E = 0 3 E=E> 3 E= 0 3 E = I> 3 E 1 3 20L2 14L8 d E E E E E E E E E E E 3 3 AND LOGIC ARRAY =L> 3 = 0 3 =L> IE =T> 3 = o 13 3 O ID AND LOGIC ARRAY
|
OCR Scan
|
PDF
|
24-Pin
12L10
20L10/A
20X1O/A
20X8/A
20X4/A
20L8A/A-2/B
20L8B,
20R6B,
20R4B
20L8B
12L10
16L6
20C1
id3-e
|
151 4l
Abstract: 16l6
Text: s a / jo iu a u i iH iiz n t m ió n m E E E E E 3 03H O /l 30 03H OBH 03n snao indino 03U 03H avhhv 3 1 0 0 1 ho aN V in d N I O/l 3 E u 3 E PZS 0 # v # ;# o » o | v 1 QNO D3H03H 30 93H AVUUV - Q3U 31001 03a s n a o UO in d in o onv 03d in d N I 03tì 03U
|
OCR Scan
|
PDF
|
20-Pin
10H8/-2
12H6/-2
14H4/-2
10L8/-2
12L6/-2
14L4/-2
151 4l
16l6
|
74s409
Abstract: memorias ram SN74S409 DP8409A SM74S409-2 *LS461 74S40 SN74S40
Text: 256K Dynamic RAM Control le r / Driver SN74S409-2/DP8409A-2 SN74S409/DP8409A F eatu res/ Benefits Ordering Inform ation • All DRAM drive functions on one chip have on-chip hlghcapacitance load drivers specified up to 88 DRAMs • Drives directly all 16K, 64K and 256K DRAMs; capable
|
OCR Scan
|
PDF
|
SN74S409-2/DP8409A-2
SN74S409/DP8409A
DP8409,
DP8409A
74S409
SN74S409
memorias ram
DP8409A
SM74S409-2
*LS461
74S40
SN74S40
|
12L10
Abstract: 16L6 20C1
Text: 2 4 -P in P A L / H A L D e v ice s 12L10 E ^7^ 3 E =E> 3 E = t> 3 E =E> 3 E =E> 3 E = 0 3 E :£ > 3 E = 0 3 E =E> 3 E = 0 3 E = I> 3 E 3 - - AND LOGIC nnnnv - - - - 1 20L2 14L8 d E E E E E E E E E E E AND LOGIC ARRAY E 3 3 3 =L> 3 = 0 3 =L> IE =T> 3 = o 13
|
OCR Scan
|
PDF
|
24-Pin
12L10
20L10/A
20X1O/A
20X8/A
20X4/A
20L8A/A-2/B
U--16--
12L10
16L6
20C1
|
LS374
Abstract: LS373 1N3064 1N916 SN54LS373 SN54LS374 SN54S373 SN54S374 TB 1237 AN
Text: 8- Bit Latches, 8-B it Registers SN54LS373 SN54S373 SN54LS374 SN54S374 Features/ Benefits Ordering Information • Three-state outputs drive bus lines PART NUMBER • 8-bit data path matches byte boundaries • Hysteresis improves noise margin TEMP POLARITY
|
OCR Scan
|
PDF
|
SN54LS373
SN54S373
SN54LS374
SN54S374
SN54LS373
SN54S373
LS374
LS373
1N3064
1N916
SN54S374
TB 1237 AN
|
F3341
Abstract: xxnx 67L401
Text: Low Power First-In First-O ut FIFO 6 4 x 4 Memory 67L401 O rdering Inform ation Features/B enefits • Guaranteed 5 MHz shi(t-out/shift-ln rates PART NUMBER • Low Power Consumption • TTL inputs and outputs • Readily expandable In the bit dimensions
|
OCR Scan
|
PDF
|
67L401
F3341
67L401
64x4-bit
67L40VS
xxnx
|
memorias ram
Abstract: RE53 IMS2620 IMS2620-12 Dynamic RAM Controller 673103NL 673103ANL RS52 HM256-12
Text: 1 -Megabit Dynamic RAM Control le r / Driver Features/Benefits • Supports up to 1 M DRAMs • Capable of addressing up to 8 M 16-blt words or 8 M bytes • On-chlp capacltlve-load drivers capable of driving up to 88 DRAMs with 30-nsec typical address propagation delay and
|
OCR Scan
|
PDF
|
73103A
16-blt
30-nsec
35-nsec
tpoF32
tppF32
memorias ram
RE53
IMS2620
IMS2620-12
Dynamic RAM Controller
673103NL
673103ANL
RS52
HM256-12
|
IMS2620
Abstract: wd70 pcf50604 MB8265A-10 IMS2620-12 673102 ELSH 673102ANL 673102NL CS50
Text: 673102 6 7 3 1 02A 256K Dynamic RAM Control ler / Driver Ordering Information Features/ Benefits • Supports 16K, 64K, and 256K DRAMs PART NUMBER PACKAGE TEMPERATURE 4 8 0 ,48N.68N L, 6 8 NP Com • Capable of addressing up to 2 M 16-bit words or 2 M bytes
|
OCR Scan
|
PDF
|
73102A
16-bit
30-nsec
35-nsec
tPDF32
tpQF32
IMS2620
wd70
pcf50604
MB8265A-10
IMS2620-12
673102
ELSH
673102ANL
673102NL
CS50
|
HN613256P
Abstract: HN27C301 1S00G CRACK DETECTION PATTERNS HN27256
Text: • RELIABILITY OF HITACHI 1C MEMORIES 1. ST RU CTU RE 1C memories are basically classified into bipolar type and MOS type and utilized effectively by their characteristics. The characteristic of bipolar memo ries is high speed but small capacity, instead, MOS
|
OCR Scan
|
PDF
|
|