motorola shw
Abstract: M68300 MC68331 MC68332 MC68L300
Text: MOTOROLA Order this document by MC68L300EC16/D SEMICONDUCTOR TECHNICAL DATA MC68L300 Technical Supplement 16.78 MHz Electrical Characteristics Devices in the M68300 Modular Microcontroller Family are built up from a selection of standard functional modules. The MC68331 and MC68332 contain the same central processing unit CPU32 and
|
Original
|
PDF
|
MC68L300EC16/D
MC68L300
M68300
MC68331
MC68332
CPU32)
MC68331UM/AD)
motorola shw
MC68L300
|
MC68LK332
Abstract: 68300 MC68332
Text: Order this document by MC68LK332EC16/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68LK332 Technical Supplement 16.78 MHz Electrical Characteristics Devices in the 68300 Modular Microcontroller Family are built up from a selection of standard functional modules. The MC68LK332 incorporates a central processing unit CPU32 , a system integration
|
Original
|
PDF
|
MC68LK332EC16/D
MC68LK332
MC68LK332
CPU32)
MC68L332
MC68332
68300
|
A273
Abstract: M68300 MC68331 MC68332 MC68L300
Text: MOTOROLA Freescale Semiconductor, Inc. Order this document by MC68L300EC16/D SEMICONDUCTOR TECHNICAL DATA MC68L300 Technical Supplement 16.78 MHz Electrical Characteristics Freescale Semiconductor, Inc. Devices in the M68300 Modular Microcontroller Family are built up from a selection of standard functional modules. The MC68331 and MC68332 contain the same central processing unit CPU32 and
|
Original
|
PDF
|
MC68L300EC16/D
MC68L300
M68300
MC68331
MC68332
CPU32)
MC68331UM/AD)
A273
MC68L300
|
TRF372017
Abstract: No abstract text available
Text: TRF372017 www.ti.com SLWS224C – AUGUST 2010 – REVISED MAY 2012 • • • GND VCC_PLL CP_OUT GND VTUNE GND 41 40 39 38 37 43 42 GND REFIN 44 DATA LE 45 CLK 46 EXT_VCO 35 VCC_VCO1 VCC_DIG 3 34 LO_OUT_P GND_DIG 4 33 LO_OUT_N 12 25 GND Wireless Infrastructure
|
Original
|
PDF
|
TRF372017
SLWS224C
CDMA2000,
IS-136,
EDGE/UWC-136
TRF372017
|
XR82C684
Abstract: No abstract text available
Text: XR82C684 FEATURES ! "# $ % 3 * '( .( -( % %& ' % ' ( %( $ 3( (" %6 $ (( % * ' ( %
|
Original
|
PDF
|
XR82C684
31-Jul-09
XR82C684
|
SMD s4 67a
Abstract: S4 87A 12-bit ADC interface vhdl code for FPGA smd s4 82a smd Pj9 VHDL code for ADC and DAC SPI with FPGA smd S4 69a X1410 G100 JP40
Text: phyCOREBlackfin/BF537 HARDWARE MANUAL EDITION MAY 2007 A product of a PHYTEC Technology Holding company phyCORE-Blackfin/BF537 In this manual are descriptions for copyrighted products that are not explicitly indicated as such. The absence of the trademark and copyright ( ) symbols
|
Original
|
PDF
|
phyCOREBlackfin/BF537
phyCORE-Blackfin/BF537
L-696e
phyCORE-BF537
D-55135
SMD s4 67a
S4 87A
12-bit ADC interface vhdl code for FPGA
smd s4 82a
smd Pj9
VHDL code for ADC and DAC SPI with FPGA
smd S4 69a
X1410
G100
JP40
|
TCA 321
Abstract: TCA 345 CRC-32 G781 GR-253-CORE PM5352 30f-310 TETRA terminal
Text: PM5352 S/UNI STAR DATA SHEET PMC-1990421 ISSUE 2 SATURN USER NETWORK INTERFACE 155 STAR PM5352 S/UNI-STAR SATURN USER NETWORK INTERFACE (STAR) DATA SHEET ISSUE 2: FEBRUARY 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
|
Original
|
PDF
|
PM5352
PMC-1990421
PM5352
PMC-1990421
TCA 321
TCA 345
CRC-32
G781
GR-253-CORE
30f-310
TETRA terminal
|
17CA
Abstract: M68HC16 MC16S2CPU20B1 MC16S2CPU25B1 MC68HC16S2 MC68HC16S2CPU20 MC68HC16S2CPU25 SPMC16S2CPU20 SPMC16S2CPU25 37A6
Text: Order this document by MC68HC16S2TS/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68HC16S2 Technical Summary 16-Bit Modular Microcontroller 1 Introduction The MC68HC16S2 is a high-speed 16-bit microcontroller. It is a member of the MC68300/M68HC16 family. M68HC16 microcontrollers are built up from standard modules that interface through a common intermodule bus IMB . Standardization facilitates rapid development of devices tailored for specific applications.
|
Original
|
PDF
|
MC68HC16S2TS/D
MC68HC16S2
16-Bit
MC68HC16S2
MC68300/M68HC16
M68HC16
CPU16)
17CA
MC16S2CPU20B1
MC16S2CPU25B1
MC68HC16S2CPU20
MC68HC16S2CPU25
SPMC16S2CPU20
SPMC16S2CPU25
37A6
|
AD9891
Abstract: AD9891KBC AD9895 AD9895KBC
Text: a CCD Signal Processors with Precision Timing Generator AD9891/AD9895 FEATURES AD9891: 10-Bit 20 MHz Version AD9895: 12-Bit 30 MHz Version Correlated Double Sampler CDS 4 ؎6 dB Pixel Gain Amplifier ( PxGA ) 2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA)
|
Original
|
PDF
|
AD9891/AD9895
AD9891:
10-Bit
AD9895:
12-Bit
AD9891)
AD9895)
AD9891
AD9891KBC
AD9895
AD9895KBC
|
Untitled
Abstract: No abstract text available
Text: CCD Signal Processors with Precision Timing Generator AD9891/AD9895 a FEATURES AD9891: 10-Bit 20 MHz Version AD9895: 12-Bit 30 MHz Version Correlated Double Sampler CDS 4 ؎6 dB Pixel Gain Amplifier ( PxGA ) 2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA)
|
Original
|
PDF
|
AD9891/AD9895
AD9891:
10-Bit
AD9895:
12-Bit
AD9891)
AD9895)
|
PSR 4000 SG 100 HF
Abstract: x0e1 39A39
Text: a CCD Signal Processor with Precision Timing Generator AD9891 FEATURES 20 MSPS Correlated Double Sampler CDS 4 dB ؎ 6 dB Pixel Gain Amplifier (PxGA ) 2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA) 10-Bit 20 MHz A/D Converter Black Level Clamp with Variable Level Control
|
Original
|
PDF
|
10-Bit
64-Lead
AD9891
AD9891
64-Ball
BC-64)
MO-205-AB
C02817
PSR 4000 SG 100 HF
x0e1
39A39
|
A42 BF 331
Abstract: Date Code Formats diodes St Microelectronics MCF5272C3 JP13 M5272C3 M5407C3 MCF5272 LST670 equivalent MOLEX RJ45 lxt971l
Text: M5272C3 User’s Manual M5272C3UM/D Rev. 1.2, 1/2001 CONTENTS Paragraph Number Title Page Number Chapter 1 M5272C3 Board 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.9.1 1.9.2 1.9.3 1.9.4 1.9.5 1.9.6 1.9.7 1.10 1.11 1.12 General Hardware Description . 1-1
|
Original
|
PDF
|
M5272C3
M5272C3UM/D
TLC7733ID
PALLV16V8-10JC
MT48LC1M16A1TG-10JC
16Mbit
MC145583VF
RS232
48MHz
A42 BF 331
Date Code Formats diodes St Microelectronics
MCF5272C3
JP13
M5407C3
MCF5272
LST670 equivalent
MOLEX RJ45
lxt971l
|
Untitled
Abstract: No abstract text available
Text: 256Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V64M4 – 16 Meg x 4 x 4 Banks MT46V32M8 – 8 Meg x 8 x 4 Banks MT46V16M16 – 4 Meg x 16 x 4 Banks Features Options • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
|
Original
|
PDF
|
256Mb:
MT46V64M4
MT46V32M8
MT46V16M16
DDR400)
09005aef80768abb/Source:
09005aef82a95a3a
x4x8x16
256Mb
|
data sheet b9 39a
Abstract: DDR266 DDR266A DDR266B DDR333 DDR400 DDR400B MT46V128M4 MT46V32M16 MT46V64M8
Text: 512Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V128M4 – 32 Meg x 4 x 4 Banks MT46V64M8 – 16 Meg x 8 x 4 Banks MT46V32M16 – 8 Meg x 16 x 4 Banks Features Options • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
|
Original
|
PDF
|
512Mb:
MT46V128M4
MT46V64M8
MT46V32M16
DDR400)
09005aef80a1d9d4/Source:
09005aef82a95a3a
x4x8x16
512Mb
data sheet b9 39a
DDR266
DDR266A
DDR266B
DDR333
DDR400
DDR400B
MT46V128M4
MT46V32M16
MT46V64M8
|
|
MT46V32M16P-6TF
Abstract: MT46V32M16P-6T MT46V32M16P-6
Text: 512Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V128M4 – 32 Meg x 4 x 4 Banks MT46V64M8 – 16 Meg x 8 x 4 Banks MT46V32M16 – 8 Meg x 16 x 4 Banks Features Options • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
|
Original
|
PDF
|
512Mb:
MT46V128M4
MT46V64M8
MT46V32M16
DDR400)
operation00
09005aef80a1d9d4/Source:
09005aef82a95a3a
x4x8x16
512Mb
MT46V32M16P-6TF
MT46V32M16P-6T
MT46V32M16P-6
|
EXO 32K
Abstract: OR2C06A OR2C12A OR2T15B OR2T40B
Text: Data Sheet November 2006 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology
|
Original
|
PDF
|
16-bit
32-bit
DS99-094FPGA
DS98-022FPGA)
EXO 32K
OR2C06A
OR2C12A
OR2T15B
OR2T40B
|
OR2C06A3T144I-DB
Abstract: OR2C08A3S208I b9 39a data sheet PL1C PT10c OR2C06A OR2C12A OR2T15B OR2T40B R11C5
Text: Data Sheet October 2003 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology
|
Original
|
PDF
|
16-bit
32-bit
DS99-094FPGA
DS98-022FPGA)
OR2C06A3T144I-DB
OR2C08A3S208I
b9 39a data sheet
PL1C
PT10c
OR2C06A
OR2C12A
OR2T15B
OR2T40B
R11C5
|
PL1A
Abstract: PLC water heater plc pin diagram 25032 PT15D b9 39a data sheet PL1C PT8C OR2C12A OR2T15B OR2T40B
Text: Data Sheet January 2003 ORCA Series 2 Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance, cost-effective, low-power 0.35 µm CMOS technology OR2CxxA , 0.3 µm CMOS technology (OR2TxxA), and 0.25 µm CMOS technology
|
Original
|
PDF
|
16-bit
32-bit
DS99-094FPGA
DS98-022FPGA)
PL1A
PLC water heater plc
pin diagram 25032
PT15D
b9 39a data sheet
PL1C
PT8C
OR2C12A
OR2T15B
OR2T40B
|
75Z1
Abstract: B908
Text: 256Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V64M4 – 16 Meg x 4 x 4 banks MT46V32M8 – 8 Meg x 8 x 4 banks MT46V16M16 – 4 Meg x 16 x 4 banks Features Options • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
|
Original
|
PDF
|
256Mb:
MT46V64M4
MT46V32M8
MT46V16M16
DDR400)
09005aef80768abb/Source:
09005aef80768abb
x4x8x16
256Mb
75Z1
B908
|
Untitled
Abstract: No abstract text available
Text: 256Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V64M4 – 16 Meg x 4 x 4 banks MT46V32M8 – 8 Meg x 8 x 4 banks MT46V16M16 – 4 Meg x 16 x 4 banks Features Options • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • VDD = +2.6V ±0.1V, VDDQ = +2.6V ±0.1V (DDR400)
|
Original
|
PDF
|
256Mb:
MT46V64M4
MT46V32M8
MT46V16M16
DDR400)
09005aef80768abb/Source:
09005aef80768abb
x4x8x16
256Mb
|
MT46V32M16P-6TF
Abstract: No abstract text available
Text: 512Mb: x4, x8, x16 DDR SDRAM Features Double Data Rate DDR SDRAM MT46V128M4 – 32 Meg x 4 x 4 banks MT46V64M8 – 16 Meg x 8 x 4 banks MT46V32M16 – 8 Meg x 16 x 4 banks Features Options • VDD = 2.5V ±0.2V, VDDQ = 2.5V ±0.2V VDD = 2.6V ±0.1V, VDDQ = 2.6V ±0.1V (DDR400)1
|
Original
|
PDF
|
512Mb:
MT46V128M4
MT46V64M8
MT46V32M16
DDR400
Da900
09005aef80768abb/Source:
09005aef82a95a3a
x4x8x16
512Mb
MT46V32M16P-6TF
|
5962-9150101MZA
Abstract: qml-38535 TP1031 S43 SMD TS68332 capacitor 104 4OS smd code marking k3d SMD MARKING CODE s98
Text: REVISIONS LTR DESCRIPTION APPROVED DATE YR-MO-DA A Changes in accordance with NOR 5962-R006-98 98-01-22 Monica L. Poelking B Changes in accordance with NOR 5962-R111-98 98-05-22 Monica L. Poelking C Add device 02. Editorial changes throughout. 98-07-01 Monica L. Poelking
|
OCR Scan
|
PDF
|
5962-R006-98
5962-R111-98
10G47DB
00377B4
5962-9150101MZA
qml-38535
TP1031
S43 SMD
TS68332
capacitor 104 4OS
smd code marking k3d
SMD MARKING CODE s98
|
Untitled
Abstract: No abstract text available
Text: P B t i GEC plessey PRELIMINARY INFORMATION DS3748-2.2 June 1993 JMA31750 HIGH PERFORMANCE MIL-STD-1750 MICROPROCESSOR The G EC P le s s e y M A 31 750 is a s in g le -c h ip microprocessor that implements the full MIL-STD-1750A instruction set architecture, or Option 2 of Draft MIL-STD1750B. The processor executes all mandatory instructions and
|
OCR Scan
|
PDF
|
DS3748-2
JMA31750
MIL-STD-1750
MIL-STD-1750A
MIL-STD1750B.
MIL-STD-1750.
MA31750
MAS281.
32-bit
1x106
|
LT 7238
Abstract: TMS320LC546A TMS320LC545A
Text: TMS320C54X, TMS320LC54x FIXED-POINT DIGITAL SIGNAL PROCESSORS S P R S 0 39 A -F E B R U A R Y 1996 - REVISED JULY 1997 40-Bit Arithmetic Logic Unit ALU Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators 17- x 17-Bit Parallel Multiplier Coupled to a
|
OCR Scan
|
PDF
|
TMS320C54X,
TMS320LC54x
40-Bit
17-Bit
4073221/A
LT 7238
TMS320LC546A
TMS320LC545A
|