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    AMBA AHB DMA Search Results

    AMBA AHB DMA Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MQ82380-20 Rochester Electronics LLC 82380 - 32 Bit High Performance DMA Controller Visit Rochester Electronics LLC Buy
    MD82C37A/B Renesas Electronics Corporation CMOS High Performance Programmable DMA Controller Visit Renesas Electronics Corporation
    5962-9054302MQA Renesas Electronics Corporation CMOS High Performance Programmable DMA Controller Visit Renesas Electronics Corporation
    IS82C37A Renesas Electronics Corporation CMOS High Performance Programmable DMA Controller, PLCC, /Tube Visit Renesas Electronics Corporation
    MSP430F46161IPZR Texas Instruments 16-Bit Ultra-Low-Power MCU, 92KB Flash, 4KB RAM, Comparator, DMA, 160 Seg LCD 100-LQFP -40 to 85 Visit Texas Instruments Buy

    AMBA AHB DMA Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ahb arbiter

    Abstract: AMBA AHB DMA AMBA AHB bus arbiter arbiter master
    Text: Features  Round robin priority  Scalable Up to 16 masters SOCArbiter-AHB  AMBA AHB interface  HWDATA, HADDR and AHB con- trol steering  HBUSREQ and HGRANT arbitra- tion AMBA AHB Arbiter Core The SOC-Arbiter-AHB is used in AMBA AHB multi-master systems to arbitrate the


    Original     		PDF

    rx 922 and HIV

    Abstract: AMBA AHB specification ARM720T b10010 CP14 CP15 SANDISK 16bit
    Text: ARM720T Revision 4 AMBA AHB Bus Interface Version CORE CPU MANUAL ARM720T Revision 4 (AMBA AHB Bus Interface Version) CORE CPU MANUAL ARM720T Revision 4 (AMBA AHB Bus Interface Version) CORE CPU MANUAL ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website


    Original     		PDF ARM720T rx 922 and HIV AMBA AHB specification b10010 CP14 CP15 SANDISK 16bit

    amba ahb bus arbitration

    Abstract: AHB to APB
    Text: AHB Example AMBA SYstem - ARM DDI 0170A Addendum 02 This addendum document details the AHB BusMatrix, which is an additional component in Chapter 4 AHB Modules in the AHB Example AMBA SYstem EASY Technical Reference Manual. Text additions ARM DDI 0170A Addendum 02


    Original     		PDF 100MHz. amba ahb bus arbitration AHB to APB

    AMBA AHB specification

    Abstract: HTM64 Coresight TrustZone realview arm9 compiler ATID MRC 100-6 ARM11 ARM IHI 0029 PADDRDBG31
    Text: AMBA AHB Trace Macrocell HTM Revision: r0p4 Technical Reference Manual Copyright 2004-2008 ARM Limited. All rights reserved. ARM DDI 0328E AMBA AHB Trace Macrocell (HTM) Technical Reference Manual Copyright © 2004-2008 ARM Limited. All rights reserved.


    Original     		PDF 0328E AMBA AHB specification HTM64 Coresight TrustZone realview arm9 compiler ATID MRC 100-6 ARM11 ARM IHI 0029 PADDRDBG31

    arm9 block diagram

    Abstract: No abstract text available
    Text: Features • AMBA Advanced High-performance Bus AHB Lite Compliant Master • Performs Transfers to/from APB Communication Serial Peripherals • Supports Full-duplex and Half-duplex Peripherals 1. Description The AHB Peripheral DMA Controller (PDC) transfers data between on-chip serial


    Original     		PDF 6031AS 15-Jul-05 arm9 block diagram

    amba ahb report with verilog code

    Abstract: verilog code for amba ahb master ahb wrapper verilog code AMBA AHB to APB BUS Bridge verilog code ahb slave verilog code verilog code for amba ahb bus vhdl code for 3-8 decoder using multiplexer ahb wrapper vhdl code verilog code arm processor verilog code AMBA AHB
    Text: Example AMBA SYstem User Guide ARM DUI 0092C Example AMBA™ SYstem User Guide Copyright ARM Limited 1998 and 1999. All rights reserved. Release information Change history Date Issue Change October 1998 A First release July 1999 B Include AHB August 1999


    Original     		PDF 0092C 16-bit amba ahb report with verilog code verilog code for amba ahb master ahb wrapper verilog code AMBA AHB to APB BUS Bridge verilog code ahb slave verilog code verilog code for amba ahb bus vhdl code for 3-8 decoder using multiplexer ahb wrapper vhdl code verilog code arm processor verilog code AMBA AHB

    verilog code for amba ahb bus

    Abstract: verilog code AMBA AHB verilog code for amba ahb master ahb slave verilog code verilog code for i2s bus ahb wrapper verilog code verilog code for ahb bus slave ahb slave RTL verilog i2s amba ahb verilog code
    Text: I2S core meets the Philips InterIC Sound bus specification Supports Master/Slave and Receiver/Transmitter modes I2S-AHB Eight configurable stereo channels Inter-IC Sound Bus Core for AMBA AHB Data mode capabilities: 22.05, 24; 32, 44.1; 48; 88.2; 96; 176.4; 192kHz


    Original     		PDF 192kHz verilog code for amba ahb bus verilog code AMBA AHB verilog code for amba ahb master ahb slave verilog code verilog code for i2s bus ahb wrapper verilog code verilog code for ahb bus slave ahb slave RTL verilog i2s amba ahb verilog code

    amba ahb master slave sram controller

    Abstract: sharp 640x240 lcd amba ahb master sram controller AMBA AHB memory controller sharp lcd panel 20 pin AMBA AHB DMA 640x200 sharp pixel vhdl 320x240 VHDL LCD 640X200
    Text: Digital Blocks DB9000AHB Semiconductor IP AHB Bus TFT LCD Controller General Description The Digital Blocks DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LCD panel. In an FPGA, ASIC, or ASSP device, the microprocessor is an ARM processor and


    Original     		PDF DB9000AHB DB9000AHB amba ahb master slave sram controller sharp 640x240 lcd amba ahb master sram controller AMBA AHB memory controller sharp lcd panel 20 pin AMBA AHB DMA 640x200 sharp pixel vhdl 320x240 VHDL LCD 640X200

    circuit diagram of ddr ram

    Abstract: sdram controller ip1010 PCI AHB DMA F00232
    Text: Double Data Rate DDR SDRAM Controller (Pipelined Version) March 2004 IP Data Sheet • Bus Interfaces to PCI Target, PowerPC and AMBA (AHB) Buses Available ■ Complete Synchronous Implementation Features ■ Performance of Greater than 100MHz (200 DDR)


    Original     		PDF 100MHz circuit diagram of ddr ram sdram controller ip1010 PCI AHB DMA F00232

    PCI AHB DMA

    Abstract: ahb slave RTL AMBA AHB bus AMBA AHB DMA DMA with AHB PCI AHB bridge
    Text:  PCI specification 2.3 compliant  66MHz PCI performance  64-bit PCI data path PCI-M64AHB  Zero wait states burst mode  Full PCI bus master/target func- 64-bit/66MHz PCI PCI to AMBA AHB Interface Core tionality  Single PCI interrupt support


    Original     		PDF 66MHz 64-bit PCI-M64AHB 64-bit/66MHz PCI-M64AHB PCI AHB DMA ahb slave RTL AMBA AHB bus AMBA AHB DMA DMA with AHB PCI AHB bridge

    leon3

    Abstract: RTAX2000 LEON3FT STK4050II vhdl code CRC ECSS-E-ST-50-11C ahb fsm KEY Component for MIL-STD-1553 IP Core for FPGA APB VHDL code AMBA ahb bus protocol
    Text: SpaceWire CODEC with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet GAISLER Features Description • Full implementation of SpaceWire standard ECSS-E-ST-50-12C • Protocol ID extension ECSS-E-ST-50-11C • RMAP protocol ECSS-E-ST-50-11C • AMBA AHB back-end with DMA


    Original     		PDF ECSS-E-ST-50-12C ECSS-E-ST-50-11C leon3 RTAX2000 LEON3FT STK4050II vhdl code CRC ECSS-E-ST-50-11C ahb fsm KEY Component for MIL-STD-1553 IP Core for FPGA APB VHDL code AMBA ahb bus protocol

    ECSS-E-50-12A

    Abstract: ECSS-E-50-12 SpaceWire
    Text: SpaceWire Codec with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet Features Description • Full implementation of SpaceWire standard ECSS-E-50-12A • Protocol ID extension ECSS-E-50-11 • RMAP protocol ECSS-E-50-11 • AMBA AHB back-end with DMA • Descriptor-based autonomous multi-packet


    Original     		PDF ECSS-E-50-12A ECSS-E-50-11 ECSS-E-50-12A ECSS-E-50-12 SpaceWire

    UTM RESISTOR

    Abstract: MUSBHDRC MUSBHDRC USB2.0 High-Speed Dual-Role Controller verilog code for amba ahb bus verilog code for amba ahb master verilog code AMBA AHB UTM power RESISTOR verilog code for frame synchronization AMBA AHB bus protocol Mentor
    Text: Soft Core RTL IP Inventra MUSBHDRC USB2.0 High-Speed Dual-Role Controller D A T A S Endpoint Control EP0 Control - Host EP0 Control - Function EP1 - 15 Control Combine Endpoints DMA Requests Transmit IN Host Transaction Scheduler Interrupt Control Interrupts


    Original     		PDF 30MHz. PD-40136 002-FO UTM RESISTOR MUSBHDRC MUSBHDRC USB2.0 High-Speed Dual-Role Controller verilog code for amba ahb bus verilog code for amba ahb master verilog code AMBA AHB UTM power RESISTOR verilog code for frame synchronization AMBA AHB bus protocol Mentor

    AMBA AHB to APB BUS Bridge verilog code

    Abstract: verilog code ahb-apb bridge pc based rf wireless controlled toy car AMBA 2.0 AHB to APB BUS Bridge verilog code AMBA AHB to AHB BUS Bridge verilog code verilog code AMBA AHB verilog code for amba ahb bus verilog code for amba apb master amba ahb verilog code verilog code for amba apb bus
    Text: 沖のシステムＬＳＩ設計プラットフォーム： 沖のシステムＬＳＩ設計プラットフォーム： µµPLAT PLAT ® 沖電気工業株式会社 シリコンソリューションカンパニー ＬＳＩ事業部 Rev.1.82j 04 Jul 2001


    Original     		PDF IEEE1394 ARM920T M6ARMARM720TARM9ARM9EARMARM920TARM926EJ-S ARM940T ARM946E-SARM966E-SThumb ARM1020EARM AMBA AHB to APB BUS Bridge verilog code verilog code ahb-apb bridge pc based rf wireless controlled toy car AMBA 2.0 AHB to APB BUS Bridge verilog code AMBA AHB to AHB BUS Bridge verilog code verilog code AMBA AHB verilog code for amba ahb bus verilog code for amba apb master amba ahb verilog code verilog code for amba apb bus

    AMBA ahb bus protocol

    Abstract: AMBA AHB specification ahb arbiter amba ahb bus arbitration AMBA APB UART
    Text: AMBA Specification Rev 2.0 ARM IHI 0011A AMBA Specification (Rev 2.0) Copyright ARM Limited 1999. All rights reserved. Release information Change history Date Issue Change 13th May 1999 A First release Proprietary notice ARM, the ARM Powered logo, Thumb and StrongARM are registered trademarks of ARM Limited.


    Original     		PDF

    PL081

    Abstract: PL081 DDES
    Text: ARM PrimeCell Single Master DMA Controller PL081 Technical Reference Manual Copyright 2001 ARM Limited. All rights reserved. ARM DDI 0218B ARM PrimeCell™ Single Master DMA Controller (PL081) Technical Reference Manual Copyright © 2001 ARM Limited. All rights reserved.


    Original     		PDF PL081) 0218B PL081 PL081 DDES

    PL080

    Abstract: PL080 DDES 0000 B-23 AMBA 3.0 technical summary
    Text: ARM PrimeCell DMA Controller PL080 Technical Reference Manual Copyright 2000, 2001 ARM Limited. All rights reserved. ARM DDI 0196C ARM PrimeCell™ DMA Controller (PL080) Technical Reference Manual Copyright © 2000, 2001 ARM Limited. All rights reserved.


    Original     		PDF PL080) 0196C PL080 PL080 DDES 0000 B-23 AMBA 3.0 technical summary

    state diagram of AMBA AXI protocol v 1.0

    Abstract: AMBA AXI to AHB BUS Bridge verilog code AMBA AXI designer user guide AMBA Network Interconnect NIC-301 Implementation Guide adr-301 AMBA AXI to APB BUS Bridge verilog code AMBA ahb bus protocol verilog rtl code of Crossbar Switch AMBA APB bus protocol AMBA AHB to APB BUS Bridge verilog code
    Text: AMBA Network Interconnect NIC-301 Revision: r2p1 Technical Reference Manual Copyright 2006-2010 ARM. All rights reserved. ARM DDI 0397G (ID031010) AMBA Network Interconnect (NIC-301) Technical Reference Manual Copyright © 2006-2010 ARM. All rights reserved.


    Original     		PDF NIC-301) 0397G ID031010) ID031010 32-bit state diagram of AMBA AXI protocol v 1.0 AMBA AXI to AHB BUS Bridge verilog code AMBA AXI designer user guide AMBA Network Interconnect NIC-301 Implementation Guide adr-301 AMBA AXI to APB BUS Bridge verilog code AMBA ahb bus protocol verilog rtl code of Crossbar Switch AMBA APB bus protocol AMBA AHB to APB BUS Bridge verilog code

    PL110

    Abstract: AMBA 3.0 technical summary AMBA AHB bus arbiter
    Text: ARM PrimeCell Color LCD Controller PL110 Technical Reference Manual ARM DDI 0161D Color LCD Controller (PL110) Technical Reference Manual Copyright ARM Limited 1999, 2000. All rights reserved. Release information Change history Date Issue Change August 1999


    Original     		PDF PL110) 0161D PL110 AMBA 3.0 technical summary AMBA AHB bus arbiter

    AMBA APB UART

    Abstract: dlc10 UT699 352-CQFP state machine for ahb to apb bridge AMBA AHB memory controller UT699 memory map UT699 cpci driver ahb fsm SDRAM edac
    Text: UT699 32-bit Fault-Tolerant LEON 3FT/SPARCTM V8 Processor Aeroflex Colorado Springs 800-645-8862 www.aeroflex.com/LEON August 2009 UT699 LEON 3FT Description T Operates from 3.3V for I/O and 2.5V for core T Multifunctional memory controller supports PROM, SRAM, SDRAM, and I/O


    Original     		PDF UT699 32-bit -40oC 105oC) 352-pin 484-pin IEEE754 GR-CPCI-UT699 AMBA APB UART dlc10 352-CQFP state machine for ahb to apb bridge AMBA AHB memory controller UT699 memory map UT699 cpci driver ahb fsm SDRAM edac

    AMBA AXI to APB BUS Bridge verilog code

    Abstract: AMBA AXI designer user guide AMBA Network Interconnect NIC-301 Implementation Guide ADR-301 AMBA AXI to AHB BUS Bridge verilog code state diagram of AMBA AXI protocol v 1.0 verilog code for amba apb master AMBA AXI NIC-301 verilog code for amba ahb master
    Text: AMBA Network Interconnect NIC-301 Revision: r2p0 Technical Reference Manual Copyright 2006-2009 ARM. All rights reserved. ARM DDI 0397F (ID110409) AMBA Network Interconnect (NIC-301) Technical Reference Manual Copyright © 2006-2009 ARM. All rights reserved.


    Original     		PDF NIC-301) 0397F ID110409) ID110409 32-bit AMBA AXI to APB BUS Bridge verilog code AMBA AXI designer user guide AMBA Network Interconnect NIC-301 Implementation Guide ADR-301 AMBA AXI to AHB BUS Bridge verilog code state diagram of AMBA AXI protocol v 1.0 verilog code for amba apb master AMBA AXI NIC-301 verilog code for amba ahb master

    Untitled

    Abstract: No abstract text available
    Text: Features  STN LCD Panel Controller.  16x32 Pixel FIFO.  216 colors from available 65,536 SOC-STNLCD-AHB color support via palette ROM.  Programmable frame rates. STN LCD Panel Controller Core  Supports QVGA Panels.  Pixel DMA controller.


    Original     		PDF 16x32

    017493

    Abstract: IHI-0011A 0x78100000 001C 100C DDI-0029E 16651
    Text: DATA SHEET O K I I N T E G R A T I O N P R O D U C T S µPLAT -7C Core ARM7TDMI -Based Integration Platform April 2001 • ■ –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––


    Original     		PDF 1-800-OKI-6388 017493 IHI-0011A 0x78100000 001C 100C DDI-0029E 16651

    SPARTAN-3 XC3S400

    Abstract: spartan 2 dma spartan 3 bt.656 to RGB ADV7174 CCIR-656 XC3S400 DMA with AHB
    Text: Produces video data that meets the ITU-R BT.601/BT.656 recommendation without the SAV and EAV features TVOUT-CTRL Accepts display data input in three formats: Video Display Controller Core o RGB 24 bits/pixel o RGB 15 bits/pixel o 4:2:2 YUV (YCbCr) Provides a video data analog


    Original     		PDF 601/BT ADV7174/79 CCIR-601 CCIR-656) SPARTAN-3 XC3S400 spartan 2 dma spartan 3 bt.656 to RGB ADV7174 CCIR-656 XC3S400 DMA with AHB