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Catalog Datasheet	MFG & Type	PDF	Document Tags
R-PBGA-N114 Abstract: No abstract text available Text: MECHANICAL DATA MPBG096 – MARCH 1999 GKF R-PBGA-N114 PLASTIC BALL GRID ARRAY 4,00 TYP 5,60 5,40 0,80 0,40 16,10 15,90 0,80 W V U T R P N M L K J H G F E D C B A 14,40 TYP 1 2 3 4 5 6 0,95 0,85 1,40 MAX Seating Plane 0,55 0,45 0,08 M 0,45 0,35 0,10 4188954/A 10/98	Original	PDF	MPBG096 R-PBGA-N114) 4188954/A R-PBGA-N114
GM45 Abstract: MO-205 SN74GTLPH3245 SN74GTLPH3245GKFR Text: SN74GTLPH3245 32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER SCES291D – OCTOBER 1999 – REVISED FEBRUARY 2002 D D D D D D D Member of the Texas Instruments Widebus+ Family TI-OPC Circuitry Limits Ringing on Unevenly Loaded Backplanes OEC Circuitry Improves Signal Integrity	Original	PDF	SN74GTLPH3245 32-BIT SCES291D GM45 MO-205 SN74GTLPH3245 SN74GTLPH3245GKFR
C101 Abstract: SN74SSTV32852 SN74SSTV32852GKFR Text: SN74SSTV32852 24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS SCES361C – AUGUST 2001 – REVISED FEBRUARY 2003 D D D D D D Member of the Texas Instruments Widebus Family 1-to-2 Outputs Support Stacked DDR DIMMs Supports SSTL_2 Data Inputs	Original	PDF	SN74SSTV32852 24-BIT 48-BIT SCES361C 000-V A114-A) C101 SN74SSTV32852 SN74SSTV32852GKFR
A115-A Abstract: SN74ALVCH32501 SN74ALVCH32501KR 2B10R Text: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES144D – OCTOBER 1998 – REVISED OCTOBER 2002 D D D D D Member of the Texas Instruments Widebus+ Family UBT  Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or	Original	PDF	SN74ALVCH32501 36-BIT SCES144D 000-V A114-A) A115-A) A115-A SN74ALVCH32501 SN74ALVCH32501KR 2B10R
PC2100 Abstract: PC2700 PC3200 SN74SSTVF32852 Text: SN74SSTVF32852 24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS SCES426A – FEBRUARY 2003 – REVISED MARCH 2003 D D D D D D D D Member of the Texas Instruments Widebus Family Operates at 2.3 V to 2.7 V for PC1600, PC2100, and PC2700; 2.5 V to 2.7 V for	Original	PDF	SN74SSTVF32852 24-BIT 48-BIT SCES426A PC1600, PC2100, PC2700; PC3200 SSTV32852 SSTV32852 PC2100 PC2700 PC3200 SN74SSTVF32852
A115-A Abstract: C101 SN74GTLPH32916 SN74GTLPH32916KR Text: SN74GTLPH32916 34-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS SCES380A – JANUARY 2002 REVISED JULY 2002 D D D D D D D D D D Member of the Texas Instruments Widebus+ Family UBT Transceiver Combines D-Type Latches and D-Type Flip-Flops for	Original	PDF	SN74GTLPH32916 34-BIT SCES380A A115-A C101 SN74GTLPH32916 SN74GTLPH32916KR
A115-A Abstract: C101 SN74GTLPH32912 Text: SN74GTLPH32912 36-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER SCES379A – JANUARY 2002 – REVISED MAY 2002 D D D D D D D D D Member of the Texas Instruments Widebus+ Family UBT Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched,	Original	PDF	SN74GTLPH32912 36-BIT SCES379A A115-A C101 SN74GTLPH32912
svf852 Abstract: A115-A PC2700 SN74SSTVF32852 Text: SN74SSTVF32852 24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS SCES426 – FEBRUARY 2003 D D D D D D D D Member of the Texas Instruments Widebus Family Pinout and Functionality Compatible With JEDEC Standard SSTV32852 Pinout Optimizes 1U DDR DIMM Layout	Original	PDF	SN74SSTVF32852 24-BIT 48-BIT SCES426 SSTV32852 SSTV32852 PC2700 svf852 A115-A SN74SSTVF32852